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PDF CHT4694-QAG Data sheet ( Hoja de datos )
| Número de pieza | CHT4694-QAG | |
| Descripción | GaAs Monolithic Microwave IC | |
| Fabricantes | United Monolithic Semiconductors | |
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CHT4694-QAG
RoHS COMPLIANT
25- 40GHz ATTENUATOR
GaAs Monolithic Microwave IC in SMD leadless package
Description
The CHT4694-QAG is a variable 25-40GHz
attenuator designed for a wide range of
applications, from military to commercial
communication systems.
The circuit is manufactured with a MESFET
process, 0.7µm gate length, via holes
through the substrate and air bridges.
It is supplied in lead-free package.
Main Features
UMS
T4694
YYWW
Attenuation versus frequency & V1, V2
■ Broadband performance: 25-40GHz
■ 22dBm typical input 1dB compression point
(any attenuation)
■ 22dB dynamic range
■ DC bias: -5V<V1<0V; -5V<V2<0V
■ Single bias with V1=V2
■ Package type: 16L-QFN3x3
■ MSL 1
Main Characteristics
Tamb = +25°C
Symbol
Parameter
Min Typ Max Unit
Fin Input frequency range
25 40 GHz
Min Att. |S21| (V1=-5V;V2=-5V)
4 dB
Max Att. |S21| (V1=0V;V2=0V)
26 dB
Pin1dB Input 1dB compression point (any 20
attenuation)
22
dBm
ESD Protections: Electrostatic discharge sensitive device observe handling precautions!
Ref. : DSCHT4694QAG0211 - 30 Jul 2010
1/14
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Route Départementale 128 - BP46 - 91401 Orsay Cedex France
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
1 page  
25-40GHz Attenuator
CHT4694-QAG
Typical Measured Performances
Tamb = +25°C
Measurements in the package access planes
Attenuation versus frequency
V1 = -5V to 0V & V2= -5V and after V1= 0V & V2 = -5V to 0V
A
B
A : V1 = -5V to 0V & V2= -5V
B : V1= 0V & V2 = -5V to 0V
Ref. : DSCHT4694QAG0211 - 30 Jul 2010
5/14
Specifications subject to change without notice
Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
5 Page 
25-40GHz Attenuator
Definition of the Sij reference planes
The reference planes used for Sij measurements given
above are symmetrical from the symmetrical axis of the
package (see drawing beside). The input and output
reference planes are located at 2.65mm offset (input
wise and output wise respectively) from this axis. Then,
the given Sij parameters incorporate the land pattern of
the evaluation motherboard recommended at the page
13.
CHT4694-QAG
Recommended package footprint
Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot
print recommendations.
SMD mounting procedure
The SMD leadless package has been designed for high volume surface mount PCB
assembly process. The dimensions and footprint required for the PCB (motherboard) are
given in the drawings above.
For the mounting process standard techniques involving solder paste and a suitable reflow
process can be used. For further details, see application note AN0017.
Recommended ESD management
Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD
sensitivity and handling recommendations for the UMS package products.
Recommended environmental management
Refer to the application note AN0019 available at http://www.ums-gaas.com for
environmental data on UMS package products.
Ref. : DSCHT4694QAG0211 - 30 Jul 2010
11/14
Specifications subject to change without notice
Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet CHT4694-QAG.PDF ] | |
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