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DG541 데이터시트 PDF




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부품번호 DG541 기능
기능 Wideband/Video T Switches
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DG541 데이터시트, 핀배열, 회로
DG540, DG541, DG542
Vishay Siliconix
Wideband/Video “T” Switches
DESCRIPTION
The DG540, DG541, DG542 are high performance
monolithic wideband/video switches designed for switching
RF, video and digital signals. By utilizing a "T" switch
configuration on each channel, these devices achieve
exceptionally low crosstalk and high off-isolation. The
crosstalk and off-isolation of the DG540 are further improved
by the introduction of extra GND pins between signal pins.
To achieve TTL compatibility, low channel capacitances and
fast switching times, the DG540 family is built on the Vishay
Siliconix proprietary D/CMOS process. Each switch
conducts equally well in both directions when on.
FEATURES
Halogen-free according to IEC 61249-2-21
Definition
• Wide Bandwidth: 500 MHZ
• Low Crosstalk: - 85 dB
• High Off-Isolation: - 80 dB at 5 MHz
• "T" Switch Configuration
• TTL and CMOS Logic Compatible
• Fast Switching - tON: 45 ns
• Low RDS(on): 30
• Compliant to RoHS Directive 2002/95/EC
BENEFITS
• Flat Frequency Response
• High Color Fidelity
• Low Insertion Loss
• Improved System Performance
• Reduced Board Space
• Reduced Power Consumption
• Improved Data Throughput
APPLICATIONS
• RF and Video Switching
• RGB Switching
• Local and Wide Area Networks
• Video Routing
• Fast Data Acquisition
• ATE
• Radar/FLR Systems
• Video Multiplexing
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
IN1 1
DG540
Dual-In-Line
20 IN2
DG540
PLCC
D1 2
19 D2
3 2 1 20 19
GND 3
S1 4
V- 5
GND 6
S4 7
18 GND
17 S2
16 V+
S1
V-
GND
4
5
6
15 GND
S4 7
14 S3
GND 8
18 GND
17 S2
16 V+
15 GND
14 S3
GND 8
D4 9
13 GND
1 2 D3
9 10 11 12 13
IN4 10
11 IN3
Top View
Top View
TRUTH TABLE
Logic
0
1
Logic “0” 0.8 V
Logic “1” 2 V
Switch
OFF
ON
Document Number: 70055
www.vishay.com
S11-1429–Rev. H, 18-Jul-11
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000




DG541 pdf, 반도체, 판매, 대치품
DG540, DG541, DG542
Vishay Siliconix
SPECIFICATIONSa
Parameter
Symbol
Test Conditions
Unless Specified
V+ = 15 V, V- = - 3 V
VINH = 2 V, VINL = 0.8 Vf
A Suffix
D Suffixes
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.b Typ.c Min.d Max.d Min.d Max.d Unit
Analog Switch
Analog Signal Range
Drain-Source
On-Resistance
RDS(on) Match
Source Off Leakage Current
VANALOG
RDS(on)
RDS(on)
IS(off)
V- = - 5 V, V+ = 12
IS = - 10 mA, VD = 0 V
VS = 0 V, VD = 10 V
Full
Room
Full
Room
Room
Full
30
2
- 0.05
-5
- 10
- 500
5 -5 5
60 60
100 75
66
10 - 10 10
500 - 100 100
V
Drain Off Leakage Current
ID(off)
VS = 10 V, VD = 0 V
Room
Full
- 0.05
- 10
- 500
10 - 10 10
500 - 100 100
nA
Channel On Leakage Current
ID(on)
VS = VD = 0 V
Room
Full
- 0.05
- 10
- 1000
10
1000
- 10
- 100
10
100
Digital Control
Input Voltage High
Input Voltage Low
Input Current
VINH
VINL
IIN
VIN = GND or V+
Full
Full
Room
Full
0.05
2
-1
- 20
2
V
0.8 0.8
1
20
-1
- 20
1
20
µA
Dynamic Characteristics
On State Input Capacitancee
CS(on)
VS = VD = 0 V
Room 14
20 20
Off State Input Capacitancee
CS(off)
VS = 0 V
Room 2
4 4 pF
Off State Output Capacitancee
Bandwidth
Turn-On Time
Turn-Off Time
CD(off)
BW
tON
tOFF
VD = 0 V
RL = 50 , See Figure 5
DG540
DG541
RL = 1 k
CL = 35 pF
50 % to 90 %
DG542
DG540
See Figure 2
DG541
DG542
Room
Room
Room
Full
Room
Full
Room
Full
Room
Full
2
500
45
55
20
25
44
MHz
70 70
130 130
100 100
160 160
50 50 ns
85 85
60 60
85 85
Charge Injection
Q
CL = 1000 pF, VS = 0 V
Room - 25
See Figure 3
pC
Off Isolation
OIRR
RIN = 75 RL = 75 DG540
f = 5 MHz
DG541
See Figure 4
DG542
Room
Room
Room
- 80
- 60
- 75
dB
All Hostile Crosstalk
XTALK(AH)
RIN = 10 , RL = 75
f = 5 MHz, See Figure 6
Room - 85
Power Supplies
Positive Supply Current
Negative Supply Current
I+
All Channels On or Off
Room 3.5
Full
6
9
6
9 mA
I-
Room - 3.2
Full
-6
-9
-6
-9
Notes:
a. Refer to PROCESS OPTION FLOWCHART .
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
Document Number: 70055
4 S11-1429–Rev. H, 18-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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DG541 전자부품, 판매, 대치품
TEST CIRCUITS
DG540, DG541, DG542
Vishay Siliconix
+ 15 V
V+
S
3V
D
3V
Logic
VO Input
IN
GND
V-
RL
1 kΩ
CL
35 pF
Switch
Input
VS
-3V
CL (includes fixture and stray capacitance)
VO = VS
RL
RL + rDS(on)
Switch
Output
0
Figure 2. Switching Time
50 %
90 %
tON
tr < 20 ns
tf < 20 ns
tOFF
+ 15 V
V+
Rg S
D
Vg
3V
IN
GND
V-
-3V
VO
CL
1000 pF
ΔV O
VO
INX ON
OFF
ON
Figure 3. Charge Injection
ΔVO = measured voltage error due to charge injection
The charge injection in coulombs is ΔQ = CL x DVO
+ 15 V
C
VS
Rg = 75 Ω
0 V, 2.4 V
V+
SD
IN
GND
V- C
VO
RL
75 Ω
-3V
Off Isolation = 20 log
C = RF Bypass
VS
VO
Figure 4. Off Isolation
+ 15 V
C
VS
Rg = 50 Ω
0 V, 2.4 V
V+
SD
IN
GND
V- C
VO
RL
50 Ω
-3V
Figure 5. Bandwidth
Document Number: 70055
www.vishay.com
S11-1429–Rev. H, 18-Jul-11
7
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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