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부품번호 AD5676R 기능
기능 12-/16-Bit nanoDAC+
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AD5676R 데이터시트, 핀배열, 회로
Data Sheet
Octal, 12-/16-Bit nanoDAC+ with
2 ppm/°C Reference, SPI Interface
AD5672R/AD5676R
FEATURES
GENERAL DESCRIPTION
High performance
High relative accuracy (INL): ±3 LSB maximum at 16 bits
Total unadjusted error (TUE): ±0.14% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.06% of FSR maximum
Low drift 2.5 V reference: 2 ppm/°C typical
Wide operating ranges
−40°C to +125°C temperature range
2.7 V to 5.5 V power supply range
Easy implementation
User selectable gain of 1 or 2 (GAIN pin/gain bit)
1.8 V logic compatibility
50 MHz SPI with readback or daisy chain
Robust 2 kV HBM and 1.5 kV FICDM ESD rating
20-lead, RoHS-compliant TSSOP and LFCSP
APPLICATIONS
Optical transceivers
Base station power amplifiers
Process control (PLC input/output cards)
Industrial automation
Data acquisition systems
The AD5672R/AD5676R are low power, octal, 12-/16-bit buffered
voltage output digital-to-analog converters (DACs). They include
a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a
gain select pin giving a full-scale output of 2.5 V (gain = 1) or
5 V (gain = 2). The devices operate from a single 2.7 V to 5.5 V
supply and are guaranteed monotonic by design. The AD5672R/
AD5676R are available in a 20-lead TSSOP and in a 20-lead LFCSP
and incorporate a power-on reset circuit and a RSTSEL pin that
ensures that the DAC outputs power up to zero scale or midscale
and remain there until a valid write. The AD5672R/AD5676R
contain a power-down mode, reducing the current consumption to
1 µA typical while in power-down mode.
Table 1. Octal nanoDAC+® Devices
Interface
Reference
16-Bit
SPI
Internal
AD5676R
External
AD5676
I2C
Internal
AD5675R
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL).
AD5672R (12-bit): ±1 LSB maximum.
AD5676R (16-bit): ±3 LSB maximum.
2. Low Drift, 2.5 V On-Chip Reference.
12-Bit
AD5672R
Not applicable
AD5671R
FUNCTIONAL BLOCK DIAGRAM
VLOGIC
VDD
VREFOUT
AD5672R/AD5676R
SCLK
SYNC
SDI
SDO
LDAC
RESET
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
2.5V
REF
STRING
DAC 0
BUFFER
STRING
DAC 1
BUFFER
STRING
DAC 2
BUFFER
STRING
DAC 3
BUFFER
STRING
DAC 4
BUFFER
STRING
DAC 5
BUFFER
STRING
DAC 6
BUFFER
STRING
DAC 7
BUFFER
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
POWER-ON
RESET
GAIN POWER-DOWN
×1/×2
LOGIC
RSTSEL
Figure 1.
GAIN
GND
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com




AD5676R pdf, 반도체, 판매, 대치품
AD5672R/AD5676R
Data Sheet
Parameter
LOGIC INPUTS2
Input Current
Input Voltage
Low, VINL
High, VINH
Pin Capacitance
LOGIC OUTPUTS (SDO)2
Output Voltage
Low, VOL
High, VOH
Floating State Output Capacitance
POWER REQUIREMENTS
VLOGIC
ILOGIC
VDD
IDD
Normal Mode9
All Power-Down Modes10
Min Typ
0.7 × VLOGIC
3
Max Unit
±1 µA
0.3 × VLOGIC
V
V
pF
VLOGIC − 0.4
4
1.8
2.7
VREF + 1.5
1.1
1.8
1.1
1.8
1
1
1
1
1
1
0.4
5.5
1
1.3
0.5
1.3
5.5
5.5
1.26
2.0
1.3
2.1
1.7
1.7
2.5
2.5
5.5
5.5
V
V
pF
V
µA
µA
µA
µA
V
V
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
Test Conditions/Comments
Per pin
ISINK = 200 μA
ISOURCE = 200 μA
Power-on, −40°C to +105°C
Power-on, −40°C to +125°C
Power-down, −40°C to +105°C
Power-down, −40°C to +125°C
Gain = 1
Gain = 2
VIH = VDD, VIL = GND, VDD = 2.7 V to 5.5 V
Internal reference off, −40°C to +85°C
Internal reference on, −40°C to +85°C
Internal reference off
Internal reference on
Tristate to 1 kΩ, −40°C to +85°C
Power down to 1 kΩ, −40°C to +85°C
Tristate, −40°C to +105°C
Power down to 1 kΩ, −40°C to +105°C
Tristate to 1 kΩ, −40°C to +125°C
Power down to 1 kΩ, −40°C to +125°C
1 DC specifications tested with the outputs unloaded, unless otherwise noted. Upper dead band = 10 mV and exists only when VREF = VDD with gain = 1, or when VREF/2 =
VDD with gain = 2. Linearity calculated using a reduced code range of 12 to 4080.
2 Guaranteed by design and characterization; not production tested.
3 Together, Channel 0, Channel 1, Channel 2, and Channel 3 can source/sink 40 mA. Similarly, together, Channel 4, Channel 5, Channel 6, and Channel 7 can source/sink
40 mA up to a junction temperature of 125°C.
4 VDD = 5 V. The devices include current limiting intended to protect the devices during temporary overload conditions. Junction temperature can be exceeded during
current limit. Operation above the specified maximum operation junction temperature may impair device reliability.
5 When drawing a load current at either rail, the output voltage headroom with respect to that rail is limited by the 25 Ω typical channel resistance of the output
devices. For example, when sinking 1 mA, the minimum output voltage = 25 Ω × 1 mA = 25 mV.
6 Initial accuracy presolder reflow is ±750 µV; output voltage includes the effects of preconditioning drift. See the Internal Reference Setup section.
7 Reference is trimmed and tested at two temperatures and is characterized from −40°C to +125°C.
8 Reference temperature coefficient calculated as per the box method. See the Terminology section for further information.
9 Interface inactive. All DACs active. DAC outputs unloaded.
10 All DACs powered down.
Rev. B | Page 4 of 34

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AD5676R 전자부품, 판매, 대치품
Data Sheet
AD5672R/AD5676R
AC CHARACTERISTICS
VDD = 2.7 V to 5.5 V, 1.8 V ≤ VLOGIC ≤ 5.5 V, RL = 2 kΩ to GND, CL = 200 pF to GND, all specifications TMIN to TMAX unless otherwise
noted. The operating temperature range is −40°C to +125°C; TA = 25°C. Guaranteed by design and characterization, not production tested.
Table 4.
Parameter
Min Typ Max
OUTPUT VOLTAGE SETTLING TIME1
AD5672R
58
AD5676R
58
SLEW RATE
0.8
DIGITAL-TO-ANALOG GLITCH IMPULSE1
1.4
DIGITAL FEEDTHROUGH1
0.13
CROSSTALK1
Digital
0.1
Analog
−0.25
−1.3
DAC-to-DAC
−2.0
TOTAL HARMONIC DISTORTION2
−80
OUTPUT NOISE SPECTRAL DENSITY1
300
OUTPUT NOISE1
6
SIGNAL-TO-NOISE RATIO (SNR)
90
SPURIOUS-FREE DYNAMIC RANGE (SFDR)
83
SIGNAL-TO-NOISE-AND-DISTORTION
RATIO (SINAD)
80
Unit
µs
µs
V/µs
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
dB
nV/√Hz
µV p-p
dB
dB
dB
Test Conditions/Comments
¼ to ¾ scale settling to ±2 LSB
¼ to ¾ scale settling to ±2 LSB
1 LSB change around major carry (internal reference, gain = 1)
Internal reference, gain = 2
Internal reference, gain = 2
At TA, bandwidth = 20 kHz, VDD = 5 V, fOUT = 1 kHz
DAC code = midscale, 10 kHz, gain = 2
0.1 Hz to 10 Hz, gain = 1
At TA = 25°C, bandwidth = 20 kHz, VDD = 5 V, fOUT = 1 kHz
At TA = 25°C, bandwidth = 20 kHz, VDD = 5 V, fOUT = 1 kHz
At TA = 25°C, bandwidth = 20 kHz, VDD = 5 V, fOUT = 1 kHz
1 See the Terminology section. Measured using internal reference and gain = 1, unless otherwise noted.
2 Digitally generated sine wave at 1 kHz.
Rev. B | Page 7 of 34

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