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부품번호 | EM346 기능 |
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기능 | Integrated Dual ZigBee PRO & RF4CE Network Coprocessor | ||
제조업체 | Silicon Laboratories | ||
로고 | |||
전체 30 페이지수
EM346
High-Performance, Integrated Dual ZigBee PRO & RF4CE
Network Coprocessor
Features
- 32-bit ARM® Cortex -M3 processor
- 2.4 GHz IEEE 802.15.4-2003 transceiver & lower MAC
- 192 kB flash, with optional read protection
- 12 kB RAM memory
- AES128 encryption accelerator
- UART/SPI serial communications
- 16 GPIOs
Industry-leading ARM® Cortex -M3 processor
- Leading 32-bit processing performance
- Highly efficient Thumb-2 instruction set
- Operation at 6, 12, or 24 MHz
- Flexible Nested Vectored Interrupt Controller
Low power consumption, advanced management
- RX Current (w/ CPU): 26 mA
- TX Current (w/ CPU, +3 dBm TX): 31 mA
- Low deep sleep current, with retained RAM and GPIO:
400 nA without/800 nA with sleep timer
- Low-frequency internal RC oscillator for low-power sleep
timing
- High-frequency internal RC oscillator for fast (110 µs)
processor start-up from sleep
Exceptional RF Performance
- Normal mode link budget up to 103 dB; configurable up
to 110 dB
- –100 dBm normal RX sensitivity; configurable to
–102 dBm (1% PER, 20 byte packet)
- Configurable up to +8 dBm
- Robust Wi-Fi and Bluetooth coexistence
Innovative network and processor debug
- Packet Trace Port for non-intrusive packet trace with
Ember development tools
- Serial Wire/JTAG interface
- Standard ARM debug capabilities: Flash Patch & Break-
point; Data Watchpoint & Trace; Instrumentation Trace
Macrocell
Application Flexibility
- Single voltage operation: 2.1–3.6 V with internal 1.8 and
1.25 V regulators
- Optional 32.768 kHz crystal for higher timer accuracy
- Low external component count with single 24 MHz
crystal
- Support for external power amplifier
- Small 7x7 mm 48-pin QFN package
RF_TX_ALT_P,N
PA select
PA
RF_P,N
PA
LNA
SYNTH
DAC
IF ADC
BIAS_R
OSCA
OSCB
VDD_CORE
VREG_OUT
nRESET
Bias
HF crystal
OSC
Internal HF
RC-OSC
Calibration
ADC
1.25V
Regulator
1.8V
Regulator
POR
LF crystal
OSC
Internal LF
RC-OSC
TX_ACTIVE
MAC
+
Baseband
Packet Trace
Data
SRAM
12kB
Program
Flash
192kB
ARM® Cortex-M3TM
CPU with NVIC
and MPU
2nd level
Interrupt
controller
GPIO
registers
CPU debug
TPIU/ITM/
FPB/DWT
Always
Powered
Domain
Watchdog
Encryption
acclerator
Serial
Wire and
JTAG
debug
SWCLK,
JTCK
UART/SPI
Chip
manager
Sleep
timer
GPIO multiplexor switch
Rev 1.0 9/14
Copyright © 2014 by Silicon Laboratories
EM346
EM346
1. Typical Application
Figure 1.1 illustrates the typical application circuit, and Table 1.1 contains an example bill of materials (BOM) for
the off-chip components required by the EM346.
Note: The circuit shown in Figure 1.1 is for example purposes only, and the BOM is for budgetary quotes only. For a complete
reference design, please download one of the latest Ember Hardware Reference Designs from the Silicon Labs website
(www.silabs.com/zigbee-support).
The Balun provides an impedance transformation from the antenna to the EM346 for both TX and RX modes.
L1 tunes the impedance presented to the RF port for maximum transmit power and receive sensitivity.
The harmonic filter (L2, L3, C5, C6 and C9) provides additional suppression of the second harmonic, which
increases the margin over the FCC limit.
The 24 MHz crystal Y1 with loading capacitors is required and provides the high-frequency crystal oscillator source
for the EM346's main system clock. The 32.768 kHz crystal with loading capacitors generates a highly accurate
low-frequency crystal oscillator for use with peripherals, but it is not mandatory as the low-frequency internal RC
oscillator can be used.
Loading capacitance and ESR (C1 and R3) provides stability for the internal 1.8 V regulator.
Loading capacitance C2 provides stability for the internal 1.25 V regulator, no ESR is required because it is
contained within the chip.
Resistor R1 reduces the operating voltage of the flash memory, this reduces current consumption and improves
sensitivity by 1 dB when compared to not using it.
Various decoupling capacitors are required, these should be placed as close to their corresponding pins as
possible. For values and locations see one of the latest reference designs.
An antenna matched to 50 is required.
4 Rev 1.0
4페이지 EM346
2. Electrical Specifications
2.1. Absolute Maximum Ratings
Table 2.1 lists the absolute maximum ratings for the EM346.
Table 2.1. Absolute Maximum Ratings
Parameter
Regulator input voltage (VDD_PADS)
Test Condition
Min Max Unit
–0.3 +3.6
V
Analog, Memory and Core voltage (VDD_24MHZ,
VDD_VCO, VDD_RF, VDD_IF, VDD_PADSA,
VDD_MEM, VDD_PRE, VDD_SYNTH, VDD_CORE)
Voltage on RF_P,N; RF_TX_ALT_P,N
–0.3 +2.0
–0.3 +3.6
V
V
RF Input Power
(for max level for correct packet reception see
Table 2.7)
RX signal into a lossless —
balun
+15 dBm
Voltage on any GPIO, SWCLK, nRESET, VREG_OUT
–0.3 VDD_PADS
+0.3
V
Voltage on OSCA, OSCB, NC
–0.3 VDD_PADSA V
+0.3
Storage temperature
–40 +140
°C
Note: Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2.2. Recommended Operating Conditions
Table 2.2 lists the rated operating conditions of the EM346.
Table 2.2. Operating Conditions
Parameter
Test Condition
Min Typ Max
Regulator input voltage (VDD_PADS)
2.1 — 3.6
Analog and memory input voltage
(VDD_24MHZ, VDD_VCO, VDD_RF, VDD_IF,
VDD_PADSA, VDD_MEM, VDD_PRE,
VDD_SYNTH)
Core input voltage when supplied from internal
regulator (VDD_CORE)
Core input voltage when supplied externally
(VDD_CORE)
1.7 1.8 1.9
1.18 1.25 1.32
1.18 — 1.9
Operating temperature range, TA
–40 — +85
Note: Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Unit
V
V
V
V
°C
Rev 1.0
7
7페이지 | |||
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