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Si82395 데이터시트 PDF




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부품번호 Si82395 기능
기능 4.0A ISODrivers
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Si82395 데이터시트, 핀배열, 회로
Si8239x Data Sheet
4.0 A ISODrivers with 2.5 V VDDI and Safety Features
The Si8239x combines two isolated drivers with either an independent input control or a
single input into a single package for high power applications. All drivers operate with a
2.5 V input VDD and a maximum drive supply voltage of 24 V.
The Si8239x isolators are ideal for driving power MOSFETs and IGBTs used in a wide
variety of switched power and motor control applications. These drivers utilize Silicon
Laboratories' proprietary silicon isolation technology, supporting up to 5 kVRMS with-
stand voltage. This technology enables high CMTI (100 kV/µs), lower prop delays and
skew, reduced variation with temperature and age and tighter part-to-part matching.
It also offers some unique features such as an output UVLO fault detection and feed-
back, and automatic shutdown for both drivers, an EN (active high) instead of a DIS (ac-
tive low) pin, a safe delayed start-up time of 1 ms, fail-safe drivers with default low in
case of VDDI power-down, and dead time programmability. The Si8239x family offers
longer service life and dramatically higher reliability compared to opto-coupled gate driv-
ers.
Applications
• Power Delivery Systems
• Motor Control Systems
• Isolated DC-DC Power Supplies
• Lighting Control Systems
• Solar and Industrial Inverters
Safety Approvals (Pending)
• UL 1577 recognized
• Up to 5000 Vrms for 1 minute
• CSA component notice 5A approval
• IEC 60950-1
• VDE certification conformity
• VDE 0884-10
• EN 60950-1 (reinforced insulation)
• CQC certification approval
• GB4943.1
KEY FEATURES
• Two isolated drivers in one package
• Up to 5 kVRMS isolation
• Up to 1500 VDC peak driver-to-driver
differential voltage
• Enhanced output UVLO safety
• Status feedback to controller
• Both outputs drive low on UVLO
• EN pin for enhanced safety
• Extended VDDI: 2.5 V – 5.5 V
• PWM and dual driver versions
• 4.0 A peak output
• High electromagnetic immunity
• Extended start-up time (1ms) for safe
initialization sequence
• 30 ns propagation delay
• Transient immunity: 100 kV/µs
• Programmable dead time
• 10–200 ns
• 40–400 ns
• Deglitch option for filtering noise
• Wide operating range
• –40 to +125 °C
• RoHS-compliant packages
• SOIC-16 wide body
• SOIC-16 narrow body
• AEC-Q100 qualified
silabs.com | Smart. Connected. Energy-friendly.
Rev. 0.9




Si82395 pdf, 반도체, 판매, 대치품
Si8239x Data Sheet
System Overview
2. System Overview
The operation of an Si8239x channel is analogous to that of an optocoupler and gate driver, except an RF carrier is modulated instead
of light. This simple architecture provides a robust isolated data path and requires no special considerations or initialization at start-up.
A simplified block diagram for a single Si8239x channel is shown in the following figure.
Figure 2.1. Simplified Channel Diagram
A channel consists of an RF Transmitter and RF Receiver separated by a semiconductor-based isolation barrier. Referring to the
Transmitter, input A modulates the carrier provided by an RF oscillator using on/off keying. The Receiver contains a demodulator that
decodes the input state according to its RF energy content and applies the result to output B via the output driver. This RF on/off keying
scheme is superior to pulse code schemes as it provides best-in-class noise immunity, low power consumption, and better immunity to
magnetic fields. See the following figure for more details.
Figure 2.2. Modulation Scheme
silabs.com | Smart. Connected. Energy-friendly.
Rev. 0.9 | 3

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Si82395 전자부품, 판매, 대치품
2.2.1 Device Behavior
The following are truth tables for the Si8239x families.
Table 2.1. Si82390/1 Dual Drivers Enhanced UVLO and Status
Si8239x Data Sheet
System Overview
VIA
VIB
EN1
VDDI
VDDA
VDDB
VOA
VOB
RDY
Notes
H L H P2 P P H L H
LHHPPP LHH
HHHPPPHHH
L LHPPPL LH
X X L/NC P P P L L H Device disabled
X X X UP2 P P L L UD3 Fail-safe output when
VDDI unpowered
X X H P P UP L UD L VOA, VOB are actively
driven low if either
X X H P UP P UD L L VDDA or VDDB is UP
Note:
1. The EN pin needs to be pulled down with a 100 kΩ resistor externally to GND.
2. The chip can be powered through the VIA,VIB input ESD diodes even if VDDI is unpowered. It is recommended that inputs be left
unpowered when VDDI is unpowered. The EN pin has a special ESD circuit that prevents the IC from powering up through the
EN pin.
3. UD = undetermined if same side power is UP.
Table 2.2. Si82395/6 Dual Drivers with UVLO Status
VIA
VIB
EN1
VDDI
VDDA
VDDB
VOA
VOB
RDY
Notes
HLHPPPHLH
LHHPPP LHH
HHHPPPHHH
L LHPPPL LH
X X L/NC P P P L L H Device disabled
X X X UP2 P P L L UD3 Fail-safe output when
VDDI unpowered
H X H P P UP H UD L VOA depends on
VDDA state
L X H P P UP L UD L
X H H P UP P UD H L VOB depends on
VDDB state
X L H P UP P UD L L
Note:
1. The EN pin needs to be pulled down with a 100 kΩ resistor externally to GND.
2. The chip can be powered through the VIA,VIB input ESD diodes even if VDDI is unpowered. It is recommended that inputs be left
unpowered when VDDI is unpowered. The EN pin has a special ESD circuit that prevents the IC from powering up through the
EN pin.
3. UD = undetermined if same side power is UP.
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Rev. 0.9 | 6

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