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PDF ISL97691 Data sheet ( Hoja de datos )
| Número de pieza | ISL97691 | |
| Descripción | 2.4V LED Driver | |
| Fabricantes | Intersil | |
| Logotipo |  |
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2.4V LED Driver with Independent Analog and PWM
Dimming Controls of 2 Backlights for 3D Application
ISL97691
The ISL97691 is Intersil’s highly integrated 4 channel LED driver
for single cell Li-Ion battery operated mobile displays requiring
analog dimming, and for 3D mobile display applications. It drives
four 40mA channels of LEDs up to 26V from an input supply 2.4V
to 5.5V. The ISL97691 will also drive 60mA channels up to 21V at
30% duty for high peak current 3D modes.
The ISL97691 provides 4 channels of current with 2 independent
analog dimming controls and 2 independent PWM dimming
controls. Channels 1 and 2 form one channel group and channels
3 and 4 form the other channel group. Each channel group’s
analog dimming is controlled through 1-Wire communication
with 6-bit resolution and each channel group’s PWM dimming is
controlled by a separate PWM input. This unique setup allows 2D
or 3D application where independent and dynamic channel
control of LED peak current and PWM dimming duty cycle are
possible. The ISL97691 employs adaptive boost architecture that
allows ultra low dimming duty cycle as low as 0.005% at 100Hz
dimming frequency.
The driver features dynamic headroom control that monitors the
highest LED forward voltage string and uses its feedback signal
for the minimum output regulation.
The ISL97691 incorporates extensive protection functions
including string open and short circuit detections, OVP, and OTP.
The switching frequency can be adjusted from 400kHz to 1.5MHz.
The device is offered in a 16 Ld TQFN 3x3mm package and can
operate in ambient temperature from -40°C to +85°C.
Features
• 2.4V Minimum input voltage, no need for higher voltage
supplies
• 4 x 60mA (Note 1) and 4 x 40mA (Note 2) LED current
• 2 Groups of independent analog and pwm current controls
- 1-Wire interfaces for 6-bit analog dimming
- PWM inputs for PWM dimming
- 0.005% Minimum PWM dimming duty cycle at 100Hz
• Low 0.8mA quiescent current
• ±2.5% current matching
• Adjustable switching frequency from 400kHz to 1.5MHz
• Fault protection
- OVP, OTP, channel open/short circuit protections
Applications
• Tablet, notebook PC and smart phone displays LED
backlighting
• Mobile displays for 2D or 3D LED backlighting
NOTES:
1. Not exceeding 30% of the frame rate (1/tFRAME), with VIN > 2.7V and
TA < +55°C.
2. VIN > 2.7V
I
VIN = 2.7V~5.5V
4.7µF
10Ω
L1
10µH
D1 VOUT = 24.5V, 4 x 60mA*
4.7µF 4.7µF
1µF
15nF
12kΩ
17.8kΩ
VIN
COMP
LX
OVP
ISL97691
ISET
AGND
PGND
100pF
470kΩ
23.7kΩ
2.2nF
10
1
0.1
143kΩ
1-WIRE_1
1-WIRE_2
PWM2
PWM_1
FSW
CH1
CH2
CH3
CH4
*NOT EXCEEDING 30% PWM DUTY
FIGURE 1. TYPICAL APPLICATION CIRCUIT
0.01
0.001
fPWM: 200Hz
fPWM: 100Hz
0.0001
0.001
0.01
0.1
1
INPUT DIMMING DUTY CYCLE (%)
FIGURE 2. ULTRA LOW PWM DIMMING LINEARITY
10
February 1, 2013
FN7840.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2012, 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL97691
Absolute Maximum Ratings
VIN, FSW, ISET, COMP, OVP . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V
PWMI_1, PWMI_2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V
1-WIRE_1, 1-WIRE_2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V
CH1 to CH4, LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V
PGND, AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Above voltage ratings are all with respect to AGND pin
ESD Ratings
Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . .2.5kV
Machine Model (Tested per JESD22-A115C) . . . . . . . . . . . . . . . . . . 200V
Charged Device Model (JESD22-C101E) . . . . . . . . . . . . . . . . . . . . . . . 2kV
Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
16 LD TQFN (Notes 6, 7) . . . . . . . . . . . . . . .
51
4.6
Thermal Characterization (Typical)
PSIJT (°C/W)
16 Ld TQFN (Note 8) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.11
Maximum Continuous Junction Temperature . . . . . . . . . . . . . . . . .+125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
6. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
7. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
8. PSIJT is the PSI junction-to-top thermal characterization parameter. If the package top temperature can be measured with this rating then the die
junction temperature can be estimated more accurately than the θJC and θJC thermal resistance ratings.
Electrical Specifications All specifications below are characterized at TA = -40°C to +85°C; VIN = 3.3V, PWMI_1 = 3.3V, RISET = 26.7kΩ,
unless otherwise noted. Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER
DESCRIPTION
CONDITION
MIN
(Note 9)
TYP
MAX
(Note 9)
UNIT
GENERAL
VIN Backlight Supply Voltage
TA = +25°C
IVIN VIN Active Current, All Strings 100% Duty, All channels 100% duty
ILED = 40mA
All channels 0% duty
2.4
2.5
0.8
5.5 V
mA
mA
IAUTOSHUTDOWN VIN Shutdown Current, both 1-Wire
PWMI_1 and PWMI_2 low longer
1
µA
Interface Inputs Inactive
than tPWMTIMEOUT
VOUT
Output Voltage
VIN ≥ 2.7V, ILED = 40mA
26 V
tWAKE
Wakeup Time from Sleep
Boost and channels operating
1.5 2.2 ms
VUVLO
Undervoltage Lockout Threshold
2
2.15
2.35
V
VUVLO_HYS Undervoltage Lockout Hysteresis
150 mV
BOOST SWITCHING REGULATOR
SS
SWILimit
rDS(ON)
Eff_peak
Soft-start
Boost FET Current Limit
Internal Boost Switch ON-Resistance
Peak Efficiency
DMAX
Boost Maximum Duty Cycle
100% LED Duty Cycle
TA = +25°C
VIN = 5.5V, VOUT = 21V, TA = +25°C,
RFSW = 144kΩ, ICH1-CH4 = 20mA,
L = 10µH with DCR ≤ 150mΩ
VIN = 2.4V, VOUT = 21V, TA = +25°C,
RFSW = 144kΩ, ICH1-CH4 = 20mA,
L = 10µH with DCR ≤ 150mΩ
FSW = 400kHz
FSW = 1.5MHz
2.5
93.5
93
7
2.8
212
90
74
ms
3.2 A
mΩ
%
%
%
%
5 FN7840.1
February 1, 2013
5 Page 
ISL97691
Theory of Operation
PWM Boost Converter
The current mode PWM boost converter produces the minimal
voltage needed to enable the LED stack with the highest forward
voltage drop to run at the programmed current. The ISL97691
employs current mode control boost architecture that has a fast
current sense loop and a slow voltage feedback loop. This
architecture achieves the fast transient response which is
essential for portable product backlight applications where the
backlight must not flicker when the power source is changed
from a drained battery to an AC/DC adapter.
The number of LEDs that can be driven by the ISL97691 depends
on the type of LED chosen in the application. The maximum
output is 26V at 40mA from 2.7V input, or 21V at 60mA from
2.7V input with 30% dimming duty.
AutoShutdown
The ISL97691 simplifies the implementation of low power
shutdown by detecting that both PWM inputs 1-WIRE_1 and
1-WIRE_2 have been low for 120ms (typical). When this timeout
is detected on both 1-WIRE_1 and 1-WIRE_2, the boost converter
and LED string drivers are turned off while retaining the value of
the two internal 6-bit 1-Wire registers which store the analog
dimming values.
The 1-Wire interfaces may be written during shutdown mode
subject to the following constraints:
• Any interface (1-WIRE_1 or 1-WIRE_2) to be written during
shutdown should idle high between transmissions
• The first bit of every 6-bit 1-Wire transmission must be sent
with a tighter timing tolerance than normal (25µs minimum
for logic 1, 100µs minimum for logic 0). The extra 10µs allows
the ISL97691 to wakeup and measure the transmission.
It is recommended that applications requiring 1-Wire
transmissions during shutdown simply apply the constraints
described above to all transmissions.
Dimming Controls
The ISL97691 provides two groups, channels 1 and 2 as one
group and channels 3 and 4 as the other group, with
independent analog and PWM dimming.
The maximum LED current is set globally for all channels by RSET
in the range 15mA to 60mA per Equation 1:
ILEDmax
=
--1---0---6----6--
RSET
(EQ. 1)
Where:
RSET is resistor from ISET pin to GND (Ω)
ILEDmax is the peak current set by resistor RSET (A)
For example, if the maximum required LED current
(ILEDmax) is 60mA, then the RSET value needed is:
RSET = 1066 ⁄ 0.06 = 17.8kΩ
Choose nearest standard resistor: 17.8kΩ, 0.1%
(EQ. 2)
ANALOG DIMMING
The channel peak current for the two groups may be reduced
from the maximum LED current set by RSET by analog dimming
through two 6-bit DACs. The DACs are updated with simple
negative pulse duration and pulse counting 1-Wire interfaces.
1-WIRE DATA
REF
6-BIT DAC
+-
PWM SIGNAL
+
-
FIGURE 18.
Channels 1 and 2 are set through the 1-WIRE_1 pin, and
channels 3 and 4 are set through the 1-WIRE_2 pin. The two
1-Wire interfaces are independent of the two PWM inputs
PWMI_1 and PWMI_2, and any combination of these 4 inputs
may be active at the same time.
The 1-Wire interface provides 6-bit (64-level) analog dimming
resolution. The interface uses a normally high connection for use
with open-drain driving schemes and Intersil’s 1-Wire interface.
When held low for between 15µs and 45µs, the interface reads a
logic 1. When held low for between 90µs and 120µs the
interface reads a logic 0. When held low for greater that 215µs,
the interface loads the last 6 bits into the brightness control
register and updates the peak current. The required minimum
high time is 3µs.
The 1-Wire programming is summarized as follows:
• Logic 0 = Negative pulse >90µs and <120µs
• Logic 1 = Negative pulse >15µs and <45µs
• Load = Negative pulse >215µs
Figure 18 shows an example of transmitting and loading the
value b’100101’.
The serial interface defaults to b’111111’ (63) on power-up. The
maximum LED current ILEDmax set by resistor RSET for each of
the two channel groups 1 and 2 is digitally adjusted by each
channel’s brightness control register per Equation 3:
ILED
=
IL
E
D
m
a
x
×
--N----
63
(EQ. 3)
Where:
N is the integer value 1 to 63 in the channel groups’ brightness
control register
ILEDmax is the peak current set by resistor RSET (A)
11 FN7840.1
February 1, 2013
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet ISL97691.PDF ] | |
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