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Número de pieza | SI53102-A2 | |
Descripción | FAN-OUT CLOCK BUFFER | |
Fabricantes | Silicon Laboratories | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de SI53102-A2 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
No Preview Available ! Si53102-A1/A2/A3
PCI-EXPRESS GEN 1, GEN 2, GEN 3, AND GEN 4 1:2
FAN-OUT CLOCK BUFFER
Features
PCI-Express Gen 1, Gen 2,
2.5 V or 3.3 V Power supply
Gen 3, and Gen 4 common clock Spread Spectrum Tolerant
compliant
Extended Temperature:
Two low-power PCIe clock
–40 to 85 °C
outputs
Small package 8-pin TDFN
Supports Serial-ATA (SATA) at (1.4x1.6 mm)
100 MHz
For PCIe Gen 1: Si53102-A1
No termination resistors required
for differential clocks
For PCIe Gen 2: Si53102-A2
For PCIe Gen 3/4: Si53102-A3
Applications
Network Attached Storage
Multi-function Printer
Wireless Access Point
Server/Storage
Ordering Information:
See page 11
Pin Assignments
Description
Si53102-A1/A2/A3 is a family of high-performance 1:2 PCIe fan output
buffers. This low-additive-jitter clock buffer family is compliant to PCIe
Gen 1, Gen 2, Gen 3, and Gen 4 specifications. The ultra-small footprint
(1.4x1.6 mm) and industry-leading low power consumption make the
Si53102-A1/A2/A3 the ideal clock solution for consumer and embedded
applications. Measuring PCIe clock jitter is quick and easy with the Silicon
Labs PCIe Clock Jitter Tool. Download it for free at www.silabs.com/pcie-
learningcenter.
Functional Block Diagram
DIFFIN 1
DIFFIN 2
DIFF1 3
DIFF1 4
Patents pending
8 VDD
7 DIFF2
6 DIFF2
5 VSS
VDD
DIFFIN
DIFFIN
DIFF1
DIFF2
VSS
Rev 1.2 12/15
Copyright © 2015 by Silicon Laboratories
Si53102-A1/A2/A3
1 page Si53102-A1/A2/A3
Table 3. AC Electrical Specifications
Parameter
Symbol
Condition
Min
DIFFIN at 0.7 V
Input frequency
Fin
10
DIFFIN and DIFFIN
Rising/Falling Slew Rate
TR / TF
Single ended measurement:
VOL = 0.175 to VOH = 0.525 V
(Averaged)
0.6
Differential Input High Voltage
VIH
150
Differential Input Low Voltage
VIL
—
Crossing Point Voltage at 0.7 V
VOX
Single-ended measurement
250
Swing
Vcross Variation Over All edges
Differential Ringback Voltage
Time before Ringback Allowed
Absolute Maximum Input Voltage
Absolute Minimum Input Voltage
DIFFIN and DIFFIN Duty Cycle
Rise/Fall Matching
DIFF Clocks
VOX
VRB
TSTABLE
VMAX
VMIN
TDC
TRFM
Single-ended measurement
Measured at crossing point VOX
Determined as a fraction of
2 x (TR – TF)/(TR + TF)
—
–100
500
–0.3
45
—
Duty Cycle
Output Skew
Frequency Accuracy
TDC
TSKEW
FACC
Measured at crossing point VOX
Measured at 0 V differential
All output clocks
45
—
—
Slew Rate
tr/f2
Measured differentially from
0.6
±150 mV
PCIe Gen 1 Pk-Pk Additive Jitter
PCIe Gen 2 Additive Phase Jitter
Pk-
PkGEN1
RMSGEN2
PCIe Gen 1
Si53102-A1
10 kHz < F < 1.5 MHz,
Si53102-A2
—
—
PCIe Gen 2 Additive Phase Jitter RMSGEN2
1.5 MHz < F < Nyquist,
Si53102-A2
—
PCIe Gen 3 Additive Phase Jitter RMSGEN3
Includes PLL BW 2–4 MHz,
CDR = 10 MHz,
Si53102-A3
—
PCIe Gen 4 Additive Phase Jitter
Crossing Point Voltage at 0.7 V
Swing
RMSGEN4
VOX
PCIe Gen 4
—
300
Enable/Disable and Setup
Clock Stabilization from Powerup TSTABLE
Power up to first output
—
Notes:
1. Visit www.pcisig.com for complete PCIe specifications.
2. Gen 4 specifications based on the PCI-Express Base Specification 4.0 rev. 0.5.
3. Download the Silicon Labs PCIe Clock Jitter Tool at www.silabs.com/pcie-learningcenter.
Typ
100
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max Unit
175 MHz
4 V/ns
—
–150
550
mV
mV
mV
140
100
—
1.15
—
55
20
mV
mV
ps
V
V
%
%
55 %
100 ps
100 ppm
4.0 V/ns
10 ps
0.50
0.50
0.20
ps
ps
ps
0.20 ps
550 mV
3.0 ms
Rev 1.2
5
5 Page 5. Ordering Guide
Part Number
Si53102-A1-GM
Si53102-A1-GMR
Si53102-A2-GM
Si53102-A2-GMR
Si53102-A3-GM
Si53102-A3-GMR
Si53102-A1/A2/A3
Package Type
8-pin TDFN
8-pin TDFN—Tape and Reel
8-pin TDFN
8-pin TDFN—Tape and Reel
8-pin TDFN
8-pin TDFN—Tape and Reel
Temperature
Extended, –40 to 85 C
Extended, –40 to 85 C
Extended, –40 to 85 C
Extended, –40 to 85 C
Extended, –40 to 85 C
Extended, –40 to 85 C
Rev 1.2
11
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet SI53102-A2.PDF ] |
Número de pieza | Descripción | Fabricantes |
SI53102-A1 | FAN-OUT CLOCK BUFFER | Silicon Laboratories |
SI53102-A2 | FAN-OUT CLOCK BUFFER | Silicon Laboratories |
SI53102-A3 | FAN-OUT CLOCK BUFFER | Silicon Laboratories |
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