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부품번호 | PESD5V0R1BSF 기능 |
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기능 | Ultra low capacitance bidirectional ESD protection diode | ||
제조업체 | NXP Semiconductors | ||
로고 | |||
전체 12 페이지수
PESD5V0R1BSF
Ultra low capacitance bidirectional ESD protection diode
7 May 2015
Product data sheet
1. General description
Ultra low capacitance bidirectional ElectroStatic Discharge (ESD) protection diode,
part of the TrEOS Protection family. This device is housed in a DSN0603-2 (SOD962)
leadless ultra small Surface-Mounted Device (SMD) package. The TrEOS Protection
family is optimized for safeguarding very sensitive high-speed interfaces against ESD
pulses with a high level of robustness.
2. Features and benefits
• Bidirectional ESD protection of one line
• Extremely low diode capacitance Cd = 0.1 pF
• ESD protection up to ±10 kV according to IEC 61000-4-2
• Ultra small SMD package
3. Applications
ESD and surge protection for:
• ultra high-speed datalines
• very sensitive interface lines
• generic interface lines
in portable electronics, communication, consumer and computing devices.
4. Quick reference data
Table 1.
Symbol
Cd
VRWM
Quick reference data
Parameter
diode capacitance
reverse standoff
voltage
Conditions
f = 1 MHz; VR = 0 V; Tamb = 25 °C
Tamb = 25 °C
Min Typ Max Unit
- 0.1 0.15 pF
- - 5V
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NXP Semiconductors
PESD5V0R1BSF
Ultra low capacitance bidirectional ESD protection diode
9. Characteristics
Table 6.
Symbol
VRWM
Cd
Characteristics
Parameter
reverse standoff
voltage
diode capacitance
VBR breakdown voltage
VCL clamping voltage
Rdyn
IRM
dynamic resistance
reverse leakage
current
Conditions
Tamb = 25 °C
f = 1 MHz; VR = 0 V; Tamb = 25 °C
f = 2.5 GHz; VR = 0 V; Tamb = 25 °C
IR = 1 mA; Tamb = 25 °C
Tamb = 25 °C; IPPM = 4.5 A; tp = 8/20 µs [1]
Tamb = 25 °C; IPP = 8 A; tp = TLP
[2]
Tamb = 25 °C; IPP = 15 A; tp = TLP
[2]
Tamb = 25 °C; IR = 10 A
[2]
VRWM = 5 V; Tamb = 25 °C
Min Typ Max Unit
- - 5V
- 0.1 0.15 pF
- 0.1 - pF
6 10 -
V
- - 5V
- 6- V
- 9.2 - V
- 0.45 - Ω
- 1 50 nA
[1] According to IEC 61000-4-5 and IEC 61643-321.
[2] Non-repetitive current pulse, Transmission Line Pulse (TLP) tp = 100 ns; square pulse; ANSI / ESD
STM5.5.1-2008.
IPPM
IPP
0.20
Cd
(pF)
0.15
aaa-017367
-VCL -VBR -VRWM
IR
IRM
-IRM
-IR
VRWM VBR VCL
-+
0.10
0.05
-IPP
-IPPM
006aab325
Fig. 3. V-I characteristics for a bidirectional ESD
protection diode
0.00
-5
-3 -1
1
f = 1 MHz; Tamb = 25 °C
35
VR (V)
Fig. 4. Diode capacitance as a function of reverse
voltage; typical values
PESD5V0R1BSF
Product data sheet
All information provided in this document is subject to legal disclaimers.
7 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved
4 / 12
4페이지 NXP Semiconductors
PESD5V0R1BSF
Ultra low capacitance bidirectional ESD protection diode
10. Application information
The device is designed for the protection of one bidirectional data line from surge pulses
and ESD damage. The device is suitable on lines where the signal polarities are both
positive and negative with respect to ground. The device is not designed to be used on
lines connected to a DC supply.
line to be protected
ESD protection diode
Fig. 12. Application diagram
GND
aaa-002737
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. Minimize the path length between the device and the protected line.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Use ground planes whenever possible. For multilayer PCBs, use ground vias.
11. Package outline
0.15
0.13
0.325
0.275
1
0.4
0.32
0.28
0.03
max
0.625
0.575
2
0.25
0.23
Dimensions in mm
Fig. 13. Package outline DSN0603-2 (SOD962-2)
14-12-03
PESD5V0R1BSF
Product data sheet
All information provided in this document is subject to legal disclaimers.
7 May 2015
© NXP Semiconductors N.V. 2015. All rights reserved
7 / 12
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