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PDF BUK9C10-55BIT Data sheet ( Hoja de datos )
| Número de pieza | BUK9C10-55BIT | |
| Descripción | N-channel TrenchPLUS logic level FET | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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BUK9C10-55BIT
N-channel TrenchPLUS logic level FET
25 August 2014
Product data sheet
1. General description
Logic level N-channel MOSFET in a D2PAK-7 package using TrenchPLUS MOSFET
technology. The device includes TrenchPLUS current sensing and integrated diodes
for temperature sensing. This product has been designed and qualified to AEC Q101
standard for use in high performance automotive applications.
2. Features and benefits
• AEC-Q101 Compliant
• Enables temperature monitoring due to integrated temperature sensor
• Enables current sense measurement due to integrated current senseFET
• Suitable for thermally demanding environments due to 175 °C rating
3. Applications
• 12 V Automotive systems
• Motors, lamps and solenoid control
• Powertrain, chassis and body applications
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Static characteristics
RDSon
drain-source on-state VGS = 5 V; ID = 10 A; Tj = 25 °C;
resistance
Fig. 16; Fig. 17
VGS = 10 V; ID = 10 A; Tj = 25 °C;
Fig. 16; Fig. 17
ID/Isense
ratio of drain current to -55 °C < Tj < 175 °C; VGS = 5 V; Fig. 18
sense current
SF(TSD)
temperature sense
diode temperature
coefficient
IF = 250 µA; -55 °C ≤ Tj ≤ 175 °C;
Fig. 19
V(BR)DSS
drain-source
breakdown voltage
ID = 25 mA; VGS = 0 V; Tj = 25 °C
VF(TSD)
temperature sense
IF = 250 µA; Tj = 25 °C; Fig. 19
diode forward voltage
Min Typ Max Unit
-
8.2 10
mΩ
-
7.5 9
mΩ
10000 11000 12000 A/A
-5.7 -6
-6.3 mV/K
55 - - V
2.855 2.9 2.945 V
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1 page  
NXP Semiconductors
BUK9C10-55BIT
N-channel TrenchPLUS logic level FET
1
Zth (j-mb)
(K/W)
δ = 0.5
0.2
10-1 0.1
0.02
003aab901
0.05
10-2
P
δ=
tp
T
single shot
10-3
10-6
10-5
10-4
10-3
10-2
tp
T
10-1
tp (s)
t
1
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
80
Rth(j-a)
K/W
003aab972
60
001aag966
40
Fig. 7. PCB used for thermal tests; zero heat sink area
20
0
200 400
A (mm2)
Zero airflow
Fig. 6.
Thermal resistance from junction to ambient as
a function of printed-circuit board (PCB) heat
sink area
Fig. 8.
001aag967
PCB used for thermal tests; heat sink area 200
mm2
Fig. 9.
001aag968
PCB used for thermal tests; heat sink area 400
mm2
BUK9C10-55BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
25 August 2014
© NXP Semiconductors N.V. 2014. All rights reserved
5 / 14
5 Page 
NXP Semiconductors
BUK9C10-55BIT
N-channel TrenchPLUS logic level FET
11. Package outline
Plastic single-ended surface-mounted package (D2PAK-7); 7 leads (one lead cropped)
SOT427
E
D1
D
HD
4
17
eeeee e
b
A
A1
mounting
base
Lp
c
Q
0 2.5
scale
Dimensions (mm are the original dimensions)
Unit(1)
A A1 b c D
max 4.5 1.40 0.85 0.64 11
mm nom
min 4.1 1.27 0.60 0.46
D1 E e Lp HD Q
1.6 10.3
2.90 15.8 2.6
1.27
1.2 9.7
2.10 14.8 2.2
5 mm
Outline
version
SOT427
References
IEC
JEDEC
JEITA
Fig. 23. Package outline D2PAK-7 (SOT427)
BUK9C10-55BIT
Product data sheet
All information provided in this document is subject to legal disclaimers.
25 August 2014
European
projection
sot427_po
Issue date
06-03-16
12-10-16
© NXP Semiconductors N.V. 2014. All rights reserved
11 / 14
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