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부품번호 | STD7ANM60N 기능 |
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기능 | N-channel Power MOSFET | ||
제조업체 | STMicroelectronics | ||
로고 | |||
전체 20 페이지수
STB7ANM60N,
STD7ANM60N
Automotive-grade N-channel 600 V, 5 A, 0.84 Ω typ., MDmesh™ II
2
Power MOSFETs in D PAK and DPAK packages
Datasheet - production data
Features
TAB
2
3
1
D 2 PAK
TAB
3
1
DPAK
Order codes VDS @ Tjmax RDS(on) max. ID
STB7ANM60N
STD7ANM60N
650 V
0.9 Ω
5A
• Designed for automotive applications and
AEC-Q101 qualified
• 100% avalanche tested
• Low input capacitance and gate charge
• Low gate input resistance
Figure 1. Internal schematic diagram
'Ć7$%
Applications
• Switching applications
Description
*
6
These devices are N-channel Power MOSFETs
developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the
company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
efficiency converters.
$0Y
Order codes
STB7ANM60N
STD7ANM60N
Table 1. Device summary
Marking
Packages
7ANM60N
2
D PAK
DPAK
Packaging
Tape and reel
December 2013
This is information on a product in full production.
DocID023350 Rev 2
1/20
www.st.com
Electrical characteristics
2 Electrical characteristics
STB7ANM60N, STD7ANM60N
(TC = 25 °C unless otherwise specified)
Symbol
Parameter
Table 5. On /off states
Test conditions
Drain-source
V(BR)DSS breakdown voltage
ID = 1 mA, VGS = 0
IDSS
IGSS
VGS(th)
RDS(on)
Zero gate voltage
VDS = 600 V
drain current (VGS = 0) VDS = 600 V, TC=125 °C
Gate-body leakage
current (VDS = 0)
VGS = ± 20 V
Gate threshold voltage VDS = VGS, ID = 250 μA
Static drain-source on-
resistance
VGS = 10 V, ID = 2.5 A
Min. Typ. Max. Unit
600 V
1 μA
100 μA
±100 nA
2 3 4V
0.84 0.9 Ω
4/20
Symbol
Parameter
Table 6. Dynamic
Test conditions
Min. Typ. Max. Unit
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 50 V, f = 1 MHz,
VGS = 0
- 363 - pF
- 24.6 - pF
- 1.1 - pF
(1) Output equivalent
Coss eq. capacitance
VDS = 0 to 480 V, VGS = 0
- 130 - pF
Intrinsic gate
RG resistance
f = 1 MHz open drain
- 5.4 - Ω
Qg Total gate charge
VDD = 480 V, ID = 5 A,
Qgs Gate-source charge VGS = 10 V
Qgd Gate-drain charge
(see Figure 16)
- 14 - nC
2.7 - nC
7.7 - nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDS.
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Table 7. Switching times
Test conditions
VDD = 300 V, ID = 2.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 17)
Min. Typ. Max. Unit
- 7 - ns
- 10 - ns
- 26 - ns
- 12 - ns
DocID023350 Rev 2
4페이지 STB7ANM60N, STD7ANM60N
Electrical characteristics
Figure 8. Gate charge vs gate-source voltage
VGS
(V)
12
10 VDS
8
6
4
VDD=480V
ID=5A
AM06479v1 VDS
(V)
500
400
300
200
2 100
00
0 2 4 6 8 10 12 14 16 Qg(nC)
Figure 9. Static drain-source on resistance
RDS(on)
(Ohm)
0.88
VGS=10V
AM06480v1
0.86
0.84
0.82
0.80
0.78
0.76
0.74
0 1 2 3 4 5 ID(A)
Figure 10. Capacitance variations
C
(pF)
AM06481v1
Figure 11. Output capacitance stored energy
Eoss
(µJ)
AM06482v1
1000
Ciss
2.5
2.0
100 1.5
Coss
10
1
0.1 1
Crss
10 100 VDS(V)
Figure 12. Normalized gate threshold voltage vs
temperature
VGS(th)
(norm)
1.10
ID=250µA
AM06483v1
1.00
0.90
0.80
0.70
-50 -25 0 25 50 75 100
TJ(°C)
1.0
0.5
0
0 100 200 300 400 500 600 VDS(V)
Figure 13. Normalized on-resistance vs
temperature
RDS(on)
(norm)
2.1
ID=2.5A
AM06484v1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
-50 -25
0
25 50 75 100 TJ(°C)
DocID023350 Rev 2
7/20
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부품번호 | 상세설명 및 기능 | 제조사 |
STD7ANM60N | N-channel Power MOSFET | STMicroelectronics |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |