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IRF9383MPBF 데이터시트 PDF




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부품번호 IRF9383MPBF 기능
기능 Power MOSFET ( Transistor )
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IRF9383MPBF 데이터시트, 핀배열, 회로
IRF9383MPbF
Applications
l Isolation Switch for Input Power or Battery Application
l High Side Switch for Inverter Applications
Features and Benefits
l Environmentaly Friendly Product
l RoHs Compliant Containing no Lead,
no Bromide and no Halogen
l Common-Drain P-Channel MOSFETs Provides
High Level of Integration and Very Low RDS(on)
DirectFET® P-Channel Power MOSFET ‚
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
-30V max ±20V max 2.3mΩ@-10V 3.8mΩ@-4.5V
Qg tot Qgd
Qgs2
Qrr
Qoss Vgs(th)
67nC 29nC 9.4nC 315nC 59nC -1.8V
G
D
S
SD
MX
DirectFET™ ISOMETRIC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ SX ST
MQ MX
MT
MP
MC
Description
The IRF9383MTRPbF combines the latest HEXFET® P-Channel Power MOSFET Silicon technology with the advanced DirectFET®
packaging to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.6 mm profile. The DirectFET®
package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or
convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET®
package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
Orderable part number
IRF9383MTRPbF
IRF9383MTR1PbF
Package Type
DirectFET® Medium Can
DirectFET® Medium Can
Standard Pack
Form
Quantity
Tape and Reel
4800
Tape and Reel
1000
Absolute Maximum Ratings
Parameter
VDS Drain-to-Source Voltage
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
Gate-to-Source Voltage
eContinuous Drain Current, VGS @ 10V
eContinuous Drain Current, VGS @ 10V
fContinuous Drain Current, VGS @ 10V
gPulsed Drain Current
Note
"TR1" suffix EOL notice #264
Max.
-30
±20
-22
-17
-160
-180
Units
V
A
12
10 ID = -22A
8
6
4 TJ = 125°C
2 TJ = 25°C
0
2 4 6 8 10 12 14 16 18 20
-VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET® Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
14.0
12.0 ID= -18A VDS= -24V
10.0
8.0
VDS= -15V
VDS= -6.0V
6.0
4.0
2.0
0.0
0 20 40 60 80 100 120 140 160 180
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
1 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback
June 2, 2015




IRF9383MPBF pdf, 반도체, 판매, 대치품
IRF9383MPbF
1000
100
10
TOP
BOTTOM
VGS
-10V
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
-2.5V
1000
100
TOP
BOTTOM
VGS
-10V
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
-2.5V
1
-2.5V
0.1
0.01
0.1
60μs PULSE WIDTH
Tj = 25°C
1 10 100
-VDS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
1000
VDS = -15V
60μs PULSE WIDTH
100
10
-2.5V
1
0.1
60μs PULSE WIDTH
Tj = 150°C
1 10 100
-V DS, Drain-to-Source Voltage (V)
Fig 5. Typical Output Characteristics
1.6
ID = -22A
1.4 VGS = -10V
VGS = -4.5V
1.2
10
TJ = 150°C
TJ = 25°C
TJ = -40°C
1.0
12345
-VGS, Gate-to-Source Voltage (V)
Fig 6. Typical Transfer Characteristics
100000
10000
1000
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
Ciss
Coss
Crss
1.0
0.8
0.6
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 7. Normalized On-Resistance vs. Temperature
12
TJ = 25°C
Vgs = -3.5V
10 Vgs = -4.5V
Vgs = -5.0V
Vgs = -6.0V
8 Vgs = -8.0V
Vgs = -10V
Vgs = -12V
6 Vgs = -15V
4
100
1
10 100
-VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4 www.irf.com © 2015 International Rectifier
2
0 20 40 60 80 100 120 140 160 180
Fig 9. Ty-IpDi,cDarlaOinnC-uRrreesnits(tAa)nce vs.
Drain Current and Gate Voltage
Submit Datasheet Feedback
June 2, 2015

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IRF9383MPBF 전자부품, 판매, 대치품
IRF9383MPbF
D.U.T *
+
‚
-

RG
+
ƒ Circuit Layout Considerations
Low Stray Inductance
-
Ground Plane
Low Leakage Inductance
Current Transformer
-„ +
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
+
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
*VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
InIdnudcutcotroCr Cuurerrnetnt
Forward Drop
Ripple 5%
* VGS = 5V for Logic Level Devices
VDD
ISD
Fig 20. Diode Reverse Recovery Test Circuit for P-Channel HEXFET® Power MOSFETs
DirectFET® Board Footprint, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET® application note AN-1035 for all details regarding the assembly of DirectFET®.
This includes all recommendations for stencil and substrate designs.
D
S
G
S
D
G=GATE
D=DRAIN
S=SOURCE
D
D
7 www.irf.com © 2015 International Rectifier Submit Datasheet Feedback
June 2, 2015

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IRF9383MPBF

Power MOSFET ( Transistor )

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