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PDF MUR110S Data sheet ( Hoja de datos )
| Número de pieza | MUR110S | |
| Descripción | Surface Mount Ultrafast Power Rectifiers | |
| Fabricantes | Taiwan Semiconductor | |
| Logotipo |  |
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MUR105S thru MUR160S
Taiwan Semiconductor
CREAT BY ART
Surface Mount Ultrafast Power Rectifiers
FEATURES
- Glass passivated chip junction
- Ideal for automated placement
- Ultrafast recovery time for high efficiency
- Low forward voltage, low power loss
- Moisture sensitivity level: level 1, per J-STD-020
- Compliant to RoHS Directive 2011/65/EU and
in accordance to WEEE 2002/96/EC
- Halogen-free according to IEC 61249-2-21 definition
MECHANICAL DATA
Case: DO-214AA (SMB)
Molding compound, UL flammability classification rating 94V-0
Base P/N with suffix "G" on packing code - green compound (halogen-free)
Base P/N with prefix "H" on packing code - AEC-Q101 qualified
Terminal: Matte tin plated leads, solderable per JESD22-B102
Meet JESD 201 class 1A whisker test
with prefix "H" on packing code meet JESD 201 class 2 whisker test
Polarity: Indicated by cathode band
Weight: 0.09 g (approximately)
DO-214AA (SMB)
MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS (TA=25℃ unless otherwise noted)
PARAMETER
MUR MUR MUR MUR MUR MUR
SYMBOL
105S 110S 115S 120S 140S 160S
Maximum repetitive peak reverse voltage
VRRM
50 100 150 200 400 600
Maximum RMS voltage
VRMS
35 70 105 140 280 420
Maximum DC blocking voltage
VDC 50 100 150 200 400 600
Maximum average forward rectified current
IF(AV)
1
Peak forward surge current, 8.3 ms single half sine-wave
superimposed on rated load
IFSM
40
35
Maximum instantaneous forward voltage (Note 1)
@ 1 A, TJ=25℃
@ 1 A, TJ=150℃
VF
Maximum reverse current @ rated VR TJ=25 ℃
TJ=150 ℃
Maximum reverse recovery time (Note 2)
IR
Trr
Typical thermal resistance
Operating junction temperature range
Storage temperature range
Note 1: Pulse test with PW=300μs, 1% duty cycle
RθjL
TJ
TSTG
Note 2: Reverse Recovery Test Conditions: IF=0.5A, IR=1.0A, IRR=0.25A
0.875
0.710
2
50
25
17
- 55 to +175
- 55 to +175
1.25
1.05
5
150
50
Unit
V
V
V
A
A
V
μA
ns
OC/W
OC
OC
Document Number: DS_D1405061
Version: H14
1 page  
CREAT BY ART
MUR105S thru MUR160S
Taiwan Semiconductor
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,
assumes no responsibility or liability for any errors inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied,to
any intellectual property rights is granted by this document. Except as provided in TSC's terms and conditions of
sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty,
relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or seling these products for use in such applications do so at their own risk and agree to fully
indemnify TSC for any damages resulting from such improper use or sale.
Document Number: DS_D1405061
Version: H14
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet MUR110S.PDF ] | |
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