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부품번호 | STP10LN80K5 기능 |
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기능 | N-channel Power MOSFET | ||
제조업체 | STMicroelectronics | ||
로고 | |||
전체 14 페이지수
STP10LN80K5
N-channel 800 V, 0.55 Ω typ., 8 A MDmesh™ K5
Power MOSFET in a TO-220 package
Datasheet - production data
Figure 1: Internal schematic diagram
Features
Order code
STP10LN80K5
VDS
800 V
RDS(on) max.
0.63 Ω
ID
8A
Industry’s lowest RDS(on) x area
Industry’s best figure of merit (FoM)
Ultra-low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
This very high voltage N-channel Power
MOSFET is designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
Order code
STP10LN80K5
Table 1: Device summary
Marking
10LN80K5
Package
TO-220
Packing
Tube
December 2015
DocID027747 Rev 2
This is information on a product in full production.
1/14
www.st.com
Electrical characteristics
STP10LN80K5
2 Electrical characteristics
TC = 25 °C unless otherwise specified
Table 5: On/off-state
Symbol
Parameter
Test conditions
V(BR)DSS Drain-source breakdown voltage
IDSS Zero gate voltage drain current
IGSS
VGS(th)
RDS(on)
Gate body leakage current
Gate threshold voltage
Static drain-source on-resistance
VGS = 0 V, ID = 1 mA
VGS = 0 V, VDS = 800 V
VGS = 0 V, VDS = 800 V
TC = 125 °C
VDS = 0 V, VGS = ±20 V
VDD = VGS, ID = 100 µA
VGS = 10 V, ID = 4 A
Min. Typ.
800
34
0.55
Max.
1
Unit
V
µA
50 µA
±10 µA
5V
0.63 Ω
Table 6: Dynamic
Symbol
Parameter
Test conditions
Ciss
Coss
Crss
Co(tr)(1)
Co(er)(2)
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent capacitance time
related
Equivalent capacitance energy
related
VDS = 100 V, f = 1 MHz,
VGS = 0 V
VDS = 0 to 640 V,
VGS = 0 V
Rg Intrinsic gate resistance
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
f = 1 MHz , ID= 0 A
VDD = 640 V, ID = 8 A
VGS= 10 V
See Figure 16: "Test
circuit for gate charge
behavior"
Min. Typ. Max. Unit
- 427 - pF
- 43 - pF
- 0.25 - pF
- 72 - pF
27 - pF
-7 -Ω
- 15 - nC
- 4.2 - nC
- 9 - nC
Notes:
(1)Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
(2)Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when
VDS increases from 0 to 80% VDSS
Symbol
Parameter
td(on)
tr
td(off)
Turn-on delay time
Rise time
Turn-off delay time
tf Fall time
Table 7: Switching times
Test conditions
VDD= 400 V, ID = 4 A, RG = 4.7 Ω
VGS = 10 V
See Figure 15: "Test circuit for
resistive load switching times"
and Figure 20: "Switching time
waveform"
Min. Typ. Max. Unit
- 11.8 -
- 10 -
ns
ns
- 28 - ns
- 13 - ns
4/14 DocID027747 Rev 2
4페이지 STP10LN80K5
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Normalized gate threshold voltage
vs temperature
Figure 10: Normalized on-resistance vs
temperature
Figure 11: Normalized V(BR)DSS vs temperature
Figure 12: Output capacitance stored energy
Figure 13: Source-drain diode forward
characteristics
DocID027747 Rev 2
7/14
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부품번호 | 상세설명 및 기능 | 제조사 |
STP10LN80K5 | N-channel Power MOSFET | STMicroelectronics |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |