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UPD70F3832 데이터시트 PDF




Renesas에서 제조한 전자 부품 UPD70F3832은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 UPD70F3832 기능
기능 32-bit single-chip microcontrollers
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UPD70F3832 데이터시트, 핀배열, 회로
Preliminary Datasheet
μ PD70F3826, 70F3827, 70F3828, 70F3829, 70F3830, 70F3831,
70F3832, 70F3833, 70F3834, 70F3835, 70F3836, 70F3837
R01DS0029EJ0001
Rev.0.01
V850ES/JE3-E, V850ES/JF3-E, V850ES/JG3-ERENESAS MCU
Sep 30, 2010
Description
The μPD70F3826, 70F3827, 70F3828, 70F3829 (V850ES/JF3-E), and μPD70F3830, 70F3831, 70F3832, 70F3833
(V850ES/JF3-E), and μPD70F3834, 70F3835, 70F3836, 70F3837 (V850ES/JG3-E) are products of the V850 32-bit
single-chip microcontrollers, and include peripheral functions such as ROM/RAM, timer/counters, serial interfaces, an
A/D converter, a DMA controller , a CAN controller , a USB function controller , and a Ethernet controller.
In addition to their high real-time responsiveness and one-clock-pitch execution of instructions, the V850ES/JE3-E,
V850ES/JF3-E, and V850ES/JG3-E include instructions executed via a hardware multiplier, saturation instructions, and
bit manipulation instructions.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
V850ES/JE3-E, V850ES/JF3-E, V850ES/JG3-E Hardware User’s Manual: To be prepared
V850ES Architecture User’s Manual:
U15943E
Features
{ Number of instructions: 83
{ Minimum instruction execution time:
20 ns (@ 50 MHz operation with main clock (fXX))
{ Clock
Main clock oscillation: fX = 3 to 6.25 MHz
Subclock oscillation: fXT = 32.768 kHz
Internal oscillation: fR = 220 kHz (TYP.)
{ General-purpose registers: 32 bits × 32 registers
{ Instruction set:
Signed multiplication, saturation operations, 32-bit
shift instructions, bit manipulation instructions,
load/store instructions
{ Memory space:
64 MB linear address space
{ Internal memory
Flash memory: 64/128/256 KB
RAM:
32/48/64 KB
(Including 16 KB of data RAM area)
{ I/O lines Total: 26/42/62
{ Interrupts and exceptions
Non-maskable interrupts: 2 sources
Maskable interrupts: 63/78/85 sources
R01DS0029EJ0001 Rev.0.01
Sep 30, 2010
{ Timer/counters
16-bit timer/event counter AA (TAA): 5 channels
16-bit timer/event counter AB (TAB): 1 channel
Motor control function supported
16-bit interval timer M (TMM):
4 channels
16-bit encoder timer T (TMT):
1 channel
{ Real-time counter: 1 channel
{ Watchdog timer: 1 channel
{ Real-time output function: 6 channels
{ A/D converter: 10-bit resolution × 10/10 channels
{ Ethernet controller:
1 channel
{ USB function controller:
1 channel
{ Serial interface
CAN :1 channel (μPD70F3829, 70F3833, 70F3837 only)
Asynchronous serial interface C(UARTC): 3/4 channels
Clocked serial interface F(CSIF):
2/3/5 channels
I2C bus interface:
{ DMA controller: 4 channels
{ Power save function:
2/3 channels
HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode
{ On-chip debug function
{ Package: 64-pin LQFP (V850ES/JE3-E)
64-pin WQFN (V850ES/JE3-E)
80-pin LQFP (V850ES/JF3-E)
100-pin LQFP (V850ES/JG3-E)
113-pin FBGA (Under planing)
{ Operating supply voltage: 2.85 to 3.6 V
Page 1 of 75




UPD70F3832 pdf, 반도체, 판매, 대치품
μ PD70F3826, 70F3827, 70F3828, 70F3829, 70F3830, 70F3831, 70F3832, 70F3833, 70F3834, 70F3835, 70F3836, 70F3837
Function list (V850ES/JG3-E)
Generic Name
V850ES/JG3-E
Product Name
μPD70F3834
μPD70F3835
μPD70F3836
μPD70F3837
Internal Flash memory
64 KB
128 KB
256 KB
256 KB
memory Internal RAM
16 KB
32 KB
48 KB
48 KB
Data RAM
16 KB
16 KB
16 KB
16 KB
Memory space
64 MB
General-purpose register
32 bits × 32 registers
Clocks Main clock oscillation PLL mode : fX = 3 to 6.25 MHz, fXX = 24 to 50 MHz (multiplication by 8)
Clock through mode : fX = 3 to 6.25 MHz ( internal : fXX = 3 to 6.25 MHz)
Subclock oscillation fXT = 32.768 kHz
Internal oscillation
fR = 220 kHz (TYP.)
Minimum instruction 20 ns (@ 50 MHz operation with main system clock (fXX))
execution time
I/O ports
I/O: 62 (5 V tolerant : 35)
Timer
16-bit TAA
5 channels
16-bit TAB
1 channel
16-bit TMM
4 channels
16-bit TMT
1 channel
Motor control
1 channel
Watch timer
1 channel (RTC)
WDT
1 channel
Real-time output function
6 bits × 1 channel
10-bit A/D converter
10 channels
Serial
CSIF/UARTC
1 channel
interface CSIF/UARTC/I2C 2 channels
CSIF
2 channels
UARTC/I2C
UARTC/I2C/CAN
1 channel
1 channel
USB function
1 channel
Ethernet controller
1 channel
DMA controller
4 channels (transfer target: on-chip peripheral I/O, internal RAM)
Interrupt
External Note 1, 2
22(22)
22(22)
22(22)
22(22)
source
Internal
61
61
61
65
Power-save function
HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE modes
Reset factor
RESET pin input, watchdog timer 2 (WDT2), clock monitor (CLM), low-voltage detector (LVI)
On-chip debugging
MINICUBE, MINICUBE2 supported
Operating supply voltage
2.85 to 3.6 V
Operating ambient temperature 40 to +85°C
Package
100-pin plastic LQFP (fine pitch) (14 × 14 mm), 113-pin plastic FBGANote3
Notes 1. The figure in parentheses indicates the number of external interrupts that can release the STOP mode.
Notes 2. Include NMI.
3. Under planning.
R01DS0029EJ0001 Rev.0.01
Sep 30, 2010
Page 4 of 75

4페이지










UPD70F3832 전자부품, 판매, 대치품
μ PD70F3826, 70F3827, 70F3828, 70F3829, 70F3830, 70F3831, 70F3832, 70F3833, 70F3834, 70F3835, 70F3836, 70F3837
V850ES/JE3-E
64-pin plastic WQFN (9 × 9)
μPD70F3826K8-6B4-AX
μPD70F3828 K8-6B4-AX
μPD70F3827K8-6B4-AX
μPD70F3829K8-6B4-AX
AVREF0
AVSS
P02/NMI
P20/INTP01
VDD
REGCNote2
VSS
X1
X2
RESET
XT1
XT2
P30/TXDC0/SIF2/TIAA00/TOA00
P31/RXDC0/SOF2/TIAA01/TOAA01
P32/ASCKC0/SCKF2/TIAA10/TOAA10
P50/INTP07/DDI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
exposed die pad
48 P1MDIO
47 P1MDC
46 P1COL
45 P1CRS
44 EVDD
43 VSS
42 FLMD0Note1
41 REGCNote2
40 VDD
39 P1RXCLK
38 P1RXER
37 P1RXDV
36 P1RXD3
35 P1RXD2
34 P1RXD1
33 P1RXD0
Notes 1. Connect to VSS in normal mode.
2. Connect the REGC pin to VSS via a 4.7 μF (preliminary value) capacitor.
3. μ PD70F3829 only.
R01DS0029EJ0001 Rev.0.01
Sep 30, 2010
Page 7 of 75

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