LTC2433-1 Datasheet PDF - Linear
| Part Number | LTC2433-1 | |
| Description | Differential Input 16-Bit No Latency ADC | |
| Manufacturers | Linear | |
| Logo |  |
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LTC2433-1
Differential Input
16-Bit No Latency ∆Σ ADC
FEATURES
s 16-Bit Differential ADC in a Tiny MSOP
s Low Supply Current: 200µA, 4µA in Autosleep
s Rail-to-Rail Differential Input/Reference
s 0.12LSB INL, No Missing Codes
s 0.16LSB Full-Scale Error and 5µV Offset
s 1.45µV RMS Noise, Independent of VREF
s Very Low Transition Noise: <0.02LSB
s Operates with a Reference as Low as 100mV with
16-Bit Resolution
s Internal Oscillator—No External Components
Required
s 87dB Min, Simultaneous 50Hz and 60Hz Notch Filter
s Single Supply 2.7V to 5.5V Operation
s Pin Compatible with the 20/24-Bit LTC2431/LTC2411
s Available in 10-Lead MSOP Package
U
APPLICATIO S
s Direct Sensor Digitizer
s Weight Scales
s Direct Temperature Measurement
s Gas Analyzers
s Strain-Gage Transducers
s Instrumentation
s Data Acquisition
s Industrial Process Control
DESCRIPTIO
The LTC®2433-1 is a differential input micropower 16-bit
No Latency ∆ΣTM analog-to-digital converter with an inte-
grated oscillator. It provides 0.12LSB INL and 1.45µV
RMS noise independent of VREF. It uses delta-sigma
technology and provides single conversion settling of the
digital filter. Through a single pin, the LTC2433-1 can be
configured for better than 87dB input differential mode
rejection at 50Hz and 60Hz ±2%, or it can be driven by an
external oscillator for a user defined rejection frequency.
The internal oscillator requires no external frequency
setting components.
The converter accepts any external differential reference
voltage from 0.1V to VCC for flexible ratiometric and
remote sensing measurement configurations. The full-
scale differential input range is from – 0.5 •␣ VREF to 0.5 •
VREF. The reference common mode voltage, VREFCM, and
the input common mode voltage, VINCM, may be indepen-
dently set anywhere between GND and VCC. The DC
common mode input rejection is better than 140dB.
The LTC2433-1 communicates through a flexible 3-wire
digital interface which is compatible with SPI and
MICROWIRETM protocols.
, LTC and LT are registered trademarks of Linear Technology Corporation.
No Latency ∆Σ is a trademark of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
TYPICAL APPLICATIO
5V REF
1µF
4.9k
(100mV)
100Ω
1
VCC
2 REF+
4 IN+
10
FO
LTC2433-1
5 IN–
9
SCK
3 REF–
SDO 8
6
GND
CS 7
24331 TA01
= EXTERNAL CLOCK SOURCE
= INTERNAL OSC/SIMULTANEOUS
50Hz/60Hz REJECTION
3-WIRE
SPI INTERFACE
Minimum Resolvable Signal vs VREF
90
80
70
60
50
40
30
20
10
0
0 1 2 345
VREF (V)
24331 TA02
*FOR VREF ≥ 0.5V THE RESOLUTION
IS LIMITED BY STEP SIZE
24331fa
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LTC2433-1
WU
TI I G CHARACTERISTICS The q denotes specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL
fEOSC
tHEO
tLEO
tCONV
fISCK
DISCK
fESCK
tLESCK
tHESCK
tDOUT_ISCK
tDOUT_ESCK
t1
t2
t3
t4
tKQMAX
tKQMIN
t5
t6
PARAMETER
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time
Internal SCK Frequency
Internal SCK Duty Cycle
External SCK Frequency Range
External SCK Low Period
External SCK High Period
Internal SCK 19-Bit Data Output Time
External SCK 19-Bit Data Output Time
CS ↓ to SDO Low Z
CS ↑ to SDO High Z
CS ↓ to SCK ↓
CS ↓ to SCK ↑
SCK ↓ to SDO Valid
SDO Hold After SCK ↓
SCK Set-Up Before CS ↓
SCK Hold After CS ↓
CONDITIONS
FO = 0V
External Oscillator (Note 10)
Internal Oscillator (Note 9)
External Oscillator (Notes 9, 10)
(Note 9)
(Note 8)
(Note 8)
(Note 8)
Internal Oscillator (Notes 9, 11)
External Oscillator (Notes 9, 10)
(Note 8)
(Note 9)
(Note 8)
(Note 5)
MIN TYP MAX UNITS
q 2.56
2000 kHz
q 0.25
390 µs
q 0.25
390 µs
q 143.8
146.7 149.6
q 20510/fEOSC (in kHz)
17.5
fEOSC/8
q 45
55
ms
ms
kHz
kHz
%
q 2000 kHz
q 250
ns
q 250
ns
q 1.06
1.09 1.11
q 152/fEOSC (in kHz)
q 19/fESCK (in kHz)
q0
200
ms
ms
ms
ns
q0
200 ns
q0
200 ns
q 50
ns
q 220 ns
q 15
ns
q 50
ns
q 50 ns
Note 1: Absolute Maximum Ratings are those values beyond which the
life of the device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: VCC = 2.7V to 5.5V unless otherwise specified.
VREF = REF+ – REF–, VREFCM = (REF+ + REF–)/2; VIN = IN+ – IN–,
VINCM = (IN+ + IN–)/2.
Note 4: FO pin tied to GND or to an external conversion clock source
with fEOSC = 139,800Hz unless otherwise specified.
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from
a precise analog input voltage. Maximum specifications are limited by
the LSB step size (VREF/216) and the single shot measurement. Typical
specifications are measured from the center of the quantization band.
Note 7: FO = GND (internal oscillator) or fEOSC = 139,800Hz ±2%
(external oscillator).
Note 8: The converter is in external SCK mode of operation such that
the SCK pin is used as digital input. The frequency of the clock signal
driving SCK during the data output is fESCK and is expressed in kHz.
Note 9: The converter is in internal SCK mode of operation such that
the SCK pin is used as digital output. In this mode of operation the
SCK pin has a total equivalent load capacitance CLOAD = 20pF.
Note 10: The external oscillator is connected to the FO pin. The external
oscillator frequency, fEOSC, is expressed in kHz.
Note 11: The converter uses the internal oscillator.
FO = 0V.
Note 12: 1.45µV RMS noise is independent of VREF. Since the noise
performance is limited by the quantization, lowering VREF improves the
effective resolution.
Note 13: Guaranteed by design and test correlation.
Note 14: The low sleep mode current is valid only when CS is high.
Note 15: These parameters are guaranteed by design over the full
supply and temperature range. Automated testing procedures are
limited by the LSB step size (VREF/65,536).
24331fa
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| Information | Total 28 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ LTC2433-1.PDF Datasheet ] | |
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