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PDF LTC3110 Data sheet ( Hoja de datos )

Número de pieza LTC3110
Descripción 2A Bidirectional Buck-Boost DC/DC Regulator and Charger/Balancer
Fabricantes Linear 
Logotipo Linear Logotipo



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Features
n VCAP Operating Range: 0.1V to 5.5V
n VSYS Operating Range: 1.71V to 5.25V
n Automatic Switchover from Charge to Backup Mode
n Programmable ±2% Accurate Charge Input Current
Limit from 125mA to 2A
n ±1% Backup Voltage Accuracy
n Automatic Backup Capacitor Balancing
n Fixed 1.2MHz Switching Frequency
n Burst Mode® Operation: 40μA Quiescent Current
n Built-In Programmable Multipurpose Comparator
with Open-Collector Output
n Open-Collector Outputs to Indicate Direction of
Operation and End of Charge
n Thermally Enhanced TSSOP-24 and 4mm × 4mm
QFN-24 Packages
Applications
n Supercapacitor Backup Converter and Charger
n Battery Backup Converter and Charger
n Servers, RAID Systems
n RF Systems with Battery/Capacitor Backup
LTC3110
2A Bidirectional Buck-Boost
DC/DC Regulator and
Charger/Balancer
Description
The LTC®3110 is a 2A bidirectional buck-boost DC/DC
regulator with capacitor charger and balancer. Its wide
0.1V to 5.5V capacitor/battery voltage and 1.8V to 5.25V
system backup voltage ranges make it well suited to a
wide variety of backup applications using supercapacitors
or batteries. A proprietary low noise switching algorithm
optimizes efficiency with capacitor/battery voltages that
are above, below or equal to the system output voltage.
The LTC3110 can autonomously transition from charge
to backup mode or switch modes based on an external
command. Pin-selectable Burst Mode operation reduces
standby current and improves light-load efficiency, which
combined with a 1μA shutdown current make the LTC3110
ideally suited for backup applications. Additional features
include voltage supervisors for direction control and end of
charge, and a general purpose comparator with open-col-
lector output for interfacing with a µC. The LTC3110 is avail-
able in thermally enhanced, low profile 24-lead TSSOP and
4mm × 4mm QFN packages.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
Typical Application
ICHARGE
FB
12V MAIN
BUS STEP-DOWN DC/DC
0.1V UP TO 5.5V
10F 1960k
10F
13.7k
523k
2.2µH
51.1Ω
1µF VCAP SW1
FBVCAP
SW2 SVSYS
CMPIN
0.1µF
220nF
VSYS
RSEN
PROG
47µF
1.50k
VMID
LTC3110
976k
FB
221k
MODE
RUN SGND PGND
DIR
CHRG
CAPOK
CMPOUT
IBACKUP
VSYS
3.25V
2A
SYSTEM
DC/DC
REGULATORS
2.5V
1.8V
1.2V
1000k 1000k
µC
END OF CHRG
CAPLOW
12V BUS
SUPERVISOR
3110 TA01a
For more information www.linear.com/LTC3110
Backup Mode Efficiency
100 VSYS = 3.25V
ISYS = 0.5A
95
1.2
1.0
90 0.8
85 0.6
80 0.4
75 0.2
70 0
1.2 1.8 2.4 3.0 3.6 4.2 4.8 5.4
VCAP (V)
3110 TA01b
3110f
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LTC3110 pdf
LTC3110
Typical Performance Characteristics TA = 25°C unless otherwise noted
Efficiency vs VCAP Voltage
100
VSYS = 3.25V
95 PWM MODE
90
85
80
75 ISYS = 0.2A
ISYS = 0.5A
70 ISYS = 1A
ISYS = 2A
65
0.5 1.5 2.5 3.5 4.5 5.5
VCAP (V)
3110 G01
Maximum Load Current
in PWM Mode
5
PULSED LOAD T = 1s
40% DUTY CYCLE
4
3
2
1 U_VSYS = 1.8V
U_VSYS = 3.3V
U_VSYS = 5.25V
0
0 1 2 3 4 5 5.5
VCAP (V)
3110 G04
RDS(ON) of SWA Static
85 VCAP < ~75% • VSYS
80
75
70 TJ = 155°C
65 TJ = 125°C
60 TJ = 85°C
55 TJ = 25°C
50
45 TJ = –45°C
0 0.5 1 1.5
TJ = 0°C
2 2.5 3 3.5 4 4.5 5
VCAP (V)
3110 G07
Burst Mode Efficiency
90
85
80
75
70
0.001
VCAP = 5V, VSYS = 3.3V
VCAP = 2.5V, VSYS = 1.8V
0.01
ISYS (A)
0.1
3110 G02
Maximum Load Current
in Burst Mode Operation
450
400
350
300
250
200
150
100 U_VSYS = 1.8V
50 U_VSYS = 3.3V
U_VSYS = 5.25V
0
0 1 2 3 4 5 5.5
VCAP (V)
3110 G05
RInDcSlu(OdNin) gofSSeWnsDe
Dynamic
Resistor
180
170
160
VSYS > ~75% • VCAP
TJ = 155°C
TJ = 130°C
150 TJ = 85°C
140
130
TJ = 25°C
TJ = 0°C
TJ = –45°C
120
110
100
90
80
70
60
1.5 2 2.5 3 3.5 4 4.5 5 5.5
VSYS (V)
3110 G08
Charge Efficiency
100
2.5
90 2.0
80 1.5
VSYS = 3.3V
RPROG = 3.01k
70 1.0
60 0.5
50 0
0.5 1.5 2.5 3.5 4.5 5.5
VCAP (V)
3110 G03
RDS(ON) of SWA Dynamic
135
125
VCAP > ~75% • VSYS
TJ = 155°C
115
TJ = 130°C
TJ = 85°C
105
TJ = 25°C
TJ = 0°C
95 TJ = –45°C
85
75
65
55
45
1.5 2 2.5 3 3.5 4 4.5 5 5.5
VCAP (V)
3110 G06
RInDcSlu(OdNin) gofSSeWnsDeSRteastiicstor
105
100
VSYS < ~75% • VCAP
TJ = 155°C
TJ = 125°C
95
90 TJ = 85°C
85
80
75 TJ = 25°C
70 TJ = 0°C
65 TJ = –45°C
60
1.5 2 2.5 3 3.5 4 4.5
VSYS (V)
3110 G09
For more information www.linear.com/LTC3110
3110f
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LTC3110 arduino
LTC3110
Pin Functions (FE/UFD)
CHRG (Pin 11/Pin 8): Charge/Backup Mode Indicator
Output. The open-drain output is pulled low while the
regulator is in charge mode. The open-drain output is
released while the regulator is in backup mode.
SVSYS (Pin 12/Pin 9): Signal Supply Voltage Input for
Buck/Boost Controller Circuitry. Pin must be shorted to
VSYS or supplied from VSYS through a RC filter. See the
Applications Information section for details.
VSYS (Pins 13, 15/Pins 10, 12): Bidirectional Power Supply
Pin for System Backup Output Voltage and Charge Cur-
rent Input Voltage. A bypass capacitor must be connected
between VSYS and PGND. Refer to the Typical Applications
schematics and the Applications Information section for
capacitor selection details.
RSEN (Pin 14/Pin 11): Current Sense Resistor Tap at Junc-
tion of Internal Sense Resistor and Switch D. Pin RSEN
is internally shorted to pin VSYS via low impedance. DC
current in RSEN must be limited to 1.6A.
SW2 (Pins 16, 17/Pin 13, 14): Switch Pin Connected to
Internal Switches C and D of the Buck-Boost Regulator.
Connect one side of the buck-boost inductor to SW2.
Provide a short wide PCB trace from the inductor to SW2
to minimize voltage transients and noise.
PGND (Pins 18, 19, Exposed Pad Pin 25/Pins 15, 16,
Exposed Pad Pin 25): Power Ground Connection. Termi-
nate all high current ground paths to PGND. The exposed
pad must be soldered to the PCB ground for rated thermal
performance.
SW1 (Pins 20, 21/Pins 17, 18): Switch Pin Connected to
Internal Switches A and B of the Buck-Boost Regulator.
Connect one side of the buck-boost inductor to SW1.
Provide a short wide PCB trace from the inductor to SW1
to minimize voltage transients and noise.
VCAP (Pins 22, 23/Pins 19, 20): Bidirectional Power Pin
for Connection to Supercap Backup Capacitor(s) or Backup
Battery(ies). When in charge mode a current flows out of
pin VCAP to charge the storage elements connected be-
tween VCAP and PGND. When in backup mode the current
is flowing into pin VCAP and the stored energy is used to
backup the load on VSYS.
VMID (Pin 24/Pin 21): Active Voltage Balancing Power
Output. This pin should be tied to the junction of two series
supercapacitors. If the output is not used, a compensation
capacitor of 1nF must be connected between pins VMID
and PGND.
For more information www.linear.com/LTC3110
3110f
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