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부품번호 | L9341V 기능 |
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기능 | QUAD LOW SIDE DRIVER | ||
제조업체 | STMicroelectronics | ||
로고 | |||
L9341
DU/DT AND DI/DT CONTROL
PWM CONTROLLED OUTPUT CURRENT
SHORT CURRENT PROTECTION AND DI-
AGNOSTIC
INTEGRATED FLYBACK DIODE
UNDERVOLTAGE SHUTDOWN
OVERVOLTAGE AND UNDERVOLTAGE DI-
AGNOSTIC
OVERTEMPERATURE DIAGNOSTIC
DESCRIPTION
The L9341 is a monolithic integrated circuit real-
ized in Multipower BCD-II mixed technology. The
driver is intended for inductive loads in synchro-
nous PWM applications, especially for valve driv-
QUAD LOW SIDE DRIVER
AVANCE DATA
MULTIPOWER BCD TECHNOLOGY
Multiwatt 15
ORDERING NUMBERS: L9341V
L9341H
ers. The output voltage and current rise and fall
slopes du/dt and di/dt are controlled.
BLOCK & APPLICATION DIAGRAM
Vcc VCC
4
I cc
10uF
10nF
REXT
12
R ext
12.4k Ω
RES1
9
RES2
10
CS
3
SCLK
11
SDI
5
SDO
13
OSC
6
C
OSC
UNDERVOLTAGE
SHUTDOWN
THERMAL
FLAG
BIAS
SERIAL
INTERFACE
&
PWM
CONTROLL
GND
8
I
GND
Vs
Is
VS
7
DIAGNOSTIC
COMP1
COMP2
V
flyth
V
offth
DRIVER
di / dt & du / dt
CONTROL
SHORT
CURRENT
PROTECTION
I outs
CHANNEL 1
CHANNEL 2
CHANNEL 3
CHANNEL 4
220nF
CD
BAT
BAT
OUT1
2
IOUT1
10nF
C
O1
OUT2
1
I
OUT2
C
O2
10nF
OUT3
15
I
OUT3
C
O3
10nF
OUT4
14
IOUT4
C
O4
10nF
March 1994
1/10
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
L9341
Figure 1: Logic Diagram of PWM Generation.
INTERNAL
CLOCK
CLK
PWM1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PWM2
PWM3
PWM4
Figure 2: Output Switching Diagram.
+12V
Vs Isf
D
If
DMOS I D
GND
Is
220 nF
5
20 mH
OUT
I out
10 nF
V out
Internal PWM Signal
Output Voltage V out
du/dt
Current through
Low Side Switch
t dpo
I D 5%
di/dt
Current through
Flyback Diode
If
di/dt
t dpo
du/dt
5%
12V
0
1A
di/dt
0
1A
di/dt
0
Figure 3: Test Circuit for Schaffner Pulses.
+5V
10 uF
+12V
220 nF
Vs
VCC
GND
OUT1
OUT2
OUT3
OUT4
4/10
D1
-2V to 40 V
Schaffner
Generator
4 x 10 nF
4 x 1 nF
4페이지 L9341
Figure 7: Diagnostic Information from QLSD to Microcontroller.
Bit Nr.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Name
F11
F12
F21
F22
F31
F32
F41
F42
RES1
RES2
TSDF
C1
C2
C3
C4
1
Contents
COMP1 State at Positive Edge of PWM1 (0: Vout1 > Vflyth; 1: Vout1 < Vflyth)
COMP2 State at Negative Edge of PWM1 (1: Vout1 > Voffth; 0 : Vout1 < Vofth)
COMP1 State at Positive Edge of PWM2 (0: Vout2 > Vflyth; 1: Vout2 < Vflyth)
COMP2 State at Negative Edge of PWM2 (1: Vout2 > Vofth; 0 : Vout2 < Vofth)
COMP1 State at Positive Edge of PWM3 (0: Vout3 > Vflyth; 1: Vout3 < Vflyth)
COMP2 State at Negative Edge of PWM3 (1: Vout3 > Voffth; 0 : Vout3 < Vofth)
COMP1 State at Positive Edge of PWM4 (0: Vout4 > Vflyth; 1: Vout4 < Vflyth)
COMP2 State at Negative Edge of PWM4 (1: Vout4 > Voffth; 0 : Vout4 < Vofth)
Logic State of RES1 Input (0: RES1 = L ; 1: RES1 = H)
Logic State of RES2 Input (0: RES2 = L ; 1: RES2 = H)
Thermal Diagnostic Flag ( 0: Overtemperature ; 1:Normal )
Current at Negative Edge of PWM1 ( 0: Iout > Ioutl ; 1: Iout < Ioutl)
Current at Negative Edge of PWM2 ( 0: Iout > Ioutl ; 1: Iout < Ioutl)
Current at Negative Edge of PWM3 ( 0: Iout > Ioutl ; 1: Iout < Ioutl)
Current at Negative Edge of PWM4 ( 0: Iout > Ioutl ; 1: Iout < Ioutl)
Framing Information (always 1)
Figure 8.
PWM
PWM
ID
V OUT
tC
t dPO
tV
t
PWMON
min
Sample point COMP2
Sample point COMP1
FFigig. .A1
Note:
For safty diagnostic take notice of the following conditions:
tPWMON ≥ tdPOMAX + tC + tV (see Fig. A)
tPWMOFF ≥ tdPOMAX + tV (see Fig. B)
tC
=
ID
SOCMIN
tV
=
Voutfmax
SOVMIN
V OUT
t dPO
t
PWMOFF
min
tV
Sample point COMP1
Sample point COMP2
FFigig..B2
7/10
7페이지 | |||
구 성 | 총 10 페이지수 | ||
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
L9341 | QUAD LOW SIDE DRIVER | STMicroelectronics |
L9341H | QUAD LOW SIDE DRIVER | STMicroelectronics |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |