COP8SGx544VEJx Datasheet PDF - National Semiconductor
| Part Number | COP8SGx544VEJx | |
| Description | 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory/ Two Comparators and USART | |
| Manufacturers | National Semiconductor | |
| Logo |  |
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January 2000
COP8SG Family
8-Bit CMOS ROM Based and OTP Microcontrollers with
8k to 32k Memory, Two Comparators and USART
General Description
The COP8SGx5 Family ROM based microcontrollers are
highly integrated COP8™ Feature core devices with 8k to
32k memory and advanced features including Analog com-
parators, and zero external components. These single-chip
CMOS devices are suited for more complex applications re-
quiring a full featured controller with larger memory, low EMI,
two comparators, and a full-duplex USART. COP8SGx7 de-
vices are 100% form-fit-function compatible 8k or 32k OTP
(One Time Programmable) versions for use in production or
development.
Erasable windowed versions are available for use with a
range of COP8 software and hardware development tools.
Family features include an 8-bit memory mapped architec-
ture, 15 MHz CKI with 0.67 µs instruction cycle, 14 inter-
rupts, three multi-function 16-bit timer/counters with PWM,
full duplex USART, MICROWIRE/PLUS™, two analog com-
parators, two power saving HALT/IDLE modes, MIWU, idle
timer, on-chip R/C oscillator, high current outputs, user se-
lectable options (WATCHDOG™, 4 clock/oscillator modes,
power-on-reset), 2.7V to 5.5V operation, program code se-
curity, and 28/40/44 pin packages.
Devices included in this datasheet are:
Device
COP8SGE5
RAM
Memory (bytes)
I/O Pins
(bytes)
8k ROM
256 24/36/40
COP8SGG5
16k ROM
512 24/36/40
COP8SGH5
20k ROM
512 24/36/40
COP8SGK5
24k ROM
512 24/36/40
COP8SGR5
32k ROM
512 24/36/40
COP8SGE7 8k OTP EPROM 256 24/36/40
COP8SGR7 32k OTP EPROM 512 24/36/40
COP8SGR7-Q3 32k EPROM
512 24/36/40
Key Features
n Low cost 8-bit microcontroller
n Quiet Design (low radiated emissions)
n Multi-Input Wakeup pins with optional interrupts (8 pins)
n Mask selectable clock options
— Crystal oscillator
— Crystal oscillator option with on-chip bias resistor
— External oscillator
— Internal R/C oscillator
n Internal Power-On-Reset — user selectable
n WATCHDOG and Clock Monitor Logic — user selectable
n Eight high current outputs
n 256 or 512 bytes on-board RAM
n 8k to 32k ROM or OTP EPROM with security feature
Packages
Temperature
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
28 DIP/SOIC, 40 DIP, 44 PLCC/QFP
-40 to +85˚C,
-40 to +125˚C
-40 to +85˚C,
-40 to +125˚C
-40 to +85˚C,
-40 to +125˚C
-40 to +85˚C,
-40 to +125˚C
-40 to +85˚C,
-40 to +125˚C
-40 to +85˚C,
-40 to +125˚C
-40 to +85˚C,
-40 to +125˚C
Room Temp.
CPU Features
n Versatile easy to use instruction set
n 0.67 µs instruction cycle time
n Fourteen multi-source vectored interrupts servicing
— External interrupt / Timers T0 — T3
— MICROWIRE/PLUS Serial Interface
— Multi-Input Wake Up
— Software Trap
— USART (2; 1 receive and 1 transmit)
— Default VIS (default interrupt)
n 8-bit Stack Pointer SP (stack in RAM)
n Two 8-bit Register Indirect Data Memory Pointers
n True bit manipulation
n BCD arithmetic instructions
COP8™, MICROWIRE/PLUS™, and WATCHDOG™ are trademarks of National Semiconductor Corporation.
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
iceMASTER® is a registered trademark of MetaLink Corporation.
© 2000 National Semiconductor Corporation DS101317
www.national.com
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Connection Diagrams (Continued)
Pinouts for 28 -, 40- and 44-Pin Packages
Port
Type
Alt. Fun
28-Pin SO
L0 I/O MIWU
11
L1
I/O MIWU or CKX
12
L2
I/O MIWU or TDX
13
L3
I/O MIWU or RDX
14
L4 I/O MIWU or T2A 15
L5 I/O MIWU or T2B 16
L6 I/O MIWU or T3A 17
L7 I/O MIWU or T3B 18
G0 I/O INT
25
G1 I/O WDOUT*
26
G2 I/O T1B
27
G3 I/O T1A
28
G4 I/O SO
1
G5 I/O SK
2
G6 I SI
3
G7 I CKO
4
D0 O
19
D1 O
20
D2 O
21
D3 O
22
D4 O
D5 O
D6 O
D7 O
F0 I/O
7
F1 I/O COMP1IN−
8
F2 I/O COMP1IN+
9
F3 I/O COMP1OUT
10
F4 I/O COMP2IN−
F5 I/O COMP2IN+
F6 I/O COMP2OUT
F7 I/O
C0 I/O
C1 I/O
C2 I/O
C3 I/O
C4 I/O
C5 I/O
C6 I/O
C7 I/O
VCC
GND
6
23
CKI I
5
RESET
I
24
* G1 operation as WDOUT is controlled by ECON bit 2.
40-Pin DIP
17
18
19
20
21
22
23
24
35
36
37
38
3
4
5
6
25
26
27
28
29
30
31
32
9
10
11
12
13
14
15
16
39
40
1
2
8
33
7
34
44-Pin PLCC
17
18
19
20
25
26
27
28
39
40
41
42
3
4
5
6
29
30
31
32
33
34
35
36
9
10
11
12
13
14
15
16
43
44
1
2
21
22
23
24
8
37
7
38
44-Pin PQFP
11
12
13
14
19
20
21
22
33
34
35
36
41
42
43
44
23
24
25
26
27
28
29
30
3
4
5
6
7
8
9
10
37
38
39
40
15
16
17
18
2
31
1
32
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