MX98741 데이터시트 PDF

Macronix International에서 제조한 전자 부품 MX98741은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.

MX98741의 기능 및 특징 중 하나는 "XRC 100 BASE-TX/FX REPEATER CONTROLLER" 입니다.

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MX98741 기능
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MX98741 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.

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INDEX MX98741 XRC 100 BASE-TX/FX REPEATER CONTROLLER 1.0 FEATURES • Eight 100 BASE-TX/FX ports; each port individually configurable to TX or FX • Direct interface with analog clock generation/recovery chips • Three Media Independent Interface (MII) • Expandable to increase number of repeater ports • Low latency design simplified high port number Class II repeater implementation • Management features accessible through MII or serial ports • All ports can be separately isolated or partitioned in reponse to fault conditions • Conforms to IEEE 802.3u Repeater Unit Specification • LED display for TX/FX port activities

Contents of page 4 out of 30 pages : INDEX MX98741 PAD # 72 73 75 66-70 84-86 78-81, 83 76 74 204 203 Name JAMO JAMI EDATENL EDAT[0:4] ACTP[5:8] ACTP[0:4] /XRCADD[0:4] ANYACT EXTCRS RESETL SCRCTRL B. Expansion Port, 18 pins I/O Description O, TTL Forced Jam Out. Active High. The OR’d forced jam signals ex- clude JAMI input) controlled by Carrier Integrity Monitor of each port. If collision occurs inside the XRC, this pin is also asserted. I, Schm Forced Jam Input. Active High. Asserted by external arbiter, and XRC will generate JAM patterns to all its ports. Note : Glitch on JAMI and EDATENL may cause internal state machine malfunction. I, Schm Enable Expansion Data. Active Low. Asserted by an external arbitor. XRC will drive data into EDAT. I/O, EXP Expansion Data. Bidirectional 5-bit wide data. By default, EDAT is an input. When EDATENL is low, EDAT changed from input mode to output mode. Internally pull-up. O, TTL Activity Out. This is the activity of port 5..8 synchronous to COCLK (50M clock used by core). It also serves as data framing signal for the packet on EDAT. ACTP leads EDAT's /J/K/ pattern by more than 80 ns and deasserted 40ns after the /T/R/ or the last byte of jam patterns. I/O, TTL Activity Out/Physical Address. When RESETL goes high, value on ACTP[0;4] will be latched into internal buffer as physical address of XRC. After reset, these five pins have the same function as ACTP[5:8]. O, TTL Any Activity. Active High. The OR’d ACTP[7:0] and TXEN

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MX98741 datasheet
MX98741 pinouts
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