ICS952621 - Programmable Timing Control Hub

ICS에서 제조한 전자 부품 ICS952621은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.

ICS952621의 기능 및 특징 중 하나는 "Programmable Timing Control Hub" 입니다.

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ICS952621 기능

Programmable Timing Control Hub

ICS

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Integrated Circuit Systems, Inc. ICS952621 Programmable Timing Control Hub™ for Next Gen P4™ processor Recommended Application: CK409 48-pin part Output Features: • 2 - 0.7V current-mode differential CPU pairs • 1 - 0.7V current-mode differential CPU pairs for ITP • 1 - 0.7V current-mode differential SRC pair • 9 - PCI (33MHz), including 3 free running PCI • 1 - USB, 48MHz • 1 - DOT, 48MHz • 2 - REF, 14.318MHz • 3 - 3V66, 66.66MHz • 1 - 3V66/VCH, selectable 48MHz or 66MHz Features/Benefits: • Supports tight ppm accuracy clocks for Serial-ATA • Supports spread spectrum modulation, 0 to -0.5% down spread a

Contents of page 4 out of 15 pages :

www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS952621 Absolute Max Symbol Parameter VDD_A 3.3V Core Supply Voltage VDD_In 3.3V Logic Input Supply Voltage Ts Storage Temperature Tambient Ambient Operating Temp Tcase Case Temperature ESD prot Input ESD protection human body model Min -0.5 -65 0 2000 Max VDD + 0.5V VDD + 0.5V 150 70 115 Units V V °C °C °C V Electrical Characteristics - Input/Supply/Common Output Parameters TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5% PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Input High Voltage Input Low Voltage Input High Current Input Low Current VIH 3.3V +/-5% 2 VIL 3.3V +/-5% VSS - 0.3 IIH VIN = VDD -5 IIL1 VIN = 0 V; Inputs with no pull-up -5 resistors IIL2 VIN = 0 V; Inputs with pull-up resistors -200 VDD + 0.3 0.8 5 V V uA uA uA Operating Supply Current IDD3.3OP Full Active, CL = Full load; 260 350 Powerdown Current IDD3.3PD all diff pairs driven all differential pairs tri-stated 0.3 35 12 Input Frequency3 Pin Inductance1 Fi Lpin VDD = 3.3 V 14.31818 7 Input Capacitance1 CIN COUT Logic Inputs Output pin capacitance 5 6 CINX X1 & X2 pins 5 Clk Stabilization1,2 TSTAB From VDD Power-Up or de- assertion of PD# to 1st clock. 1.8 Modulation Frequency Triangular Modulation 30 33 Tdrive_PD# CPU output enable after PD# de-assertion 300 Tfall_Pd# PD# fall time of 5 Trise_Pd# PD# rise time of 5 1Guaranteed by design, not 100% tested in production. 2See timing diagrams for timing requirements. 3 Input frequency should be measured at the REF output pin and tuned to ideal 14.31818MHz to meet ppm frequency accuracy on PLL outputs. mA mA mA MHz nH pF pF pF ms kHz us ns ns 3 1 1 1 1 1,2 1 1 1 2 0756A—09/10/04 4

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관련 데이터시트

부품번호	상세설명 및 기능	제조사
ICS952621	Programmable Timing Control Hub for Next Gen P4 processor	Integrated Circuit Systems
ICS952621	Programmable Timing Control Hub	ICS