WV3EG6434S-BD4 데이터시트 PDF

White Electronic Designs에서 제조한 전자 부품 WV3EG6434S-BD4은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.

WV3EG6434S-BD4의 기능 및 특징 중 하나는 "256MB - 32Mx64 DDR SDRAM UNBUFFERED" 입니다.

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WV3EG6434S-BD4 기능
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WV3EG6434S-BD4 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.

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White Electronic Designs WV3EG6434S-BD4 ADVANCED* 256MB – 32Mx64 DDR SDRAM UNBUFFERED, w/PLL FEATURES DDR266 and DDR333 Double-data-rate architecture Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input Auto and self refresh Serial presence detect Power supply: 2.5V ± 0.20V Standard 200 pin SO-DIMM package • Package height options: BD4: 31.75mm (1.25") NOTE: Consult factory for availability of: • Lead-Free or RoHS Products • Vendor source control opti

Contents of page 4 out of 10 pages :

White Electronic Designs WV3EG6434S-BD4 ADVANCED ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Current Symbol VIN, VOUT VCC, VCCQ TSTG PD IOS Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. Value -0.5 to 3.6 -1.0 to 3.6 -55 to +150 8 50 Units V V °C W mA DC OPERATING CONDITIONS TA = 0°C to 70°C Parameter Supply voltage(for device with a nominal VCC of 2.5V) I/O Supply voltage I/O Reference voltage I/O Termination voltage (system) Input logic high voltage Input logic low voltage Input Voltage Level, CK and CK# inputs Input Differential Voltage, CK and CK# inputs Input crossing point voltage, CK and CK# inputs Input leakage current Output leakage current Output High Current(Normal strengh driver); VOUT = VTT + 0.84V Output High Current(Normal strengh driver); VOUT = VTT - 0.84V Output High Current(Half strengh driver); VOUT = VTT + 0.45V wOwutwpu.Dt HaitgahSChuerreetn4t(UHa.clfosmtrengh driver); VOUT = VTT - 0.45V Symbol VCC VCCQ VREF VTT VIH(DC) VIL(DC) VIN(DC) VID(DC) VIX(DC) II IOZ IOH IOL IOH IOL Min 2.3 2.3 VCCQ/2-50mV VREF-0.04 VREF+0.15 -0.3 -0.3 0.3 1.15 -2 -5 -16.8 16.8 -9 9 Max 2.7 2.7 VCCQ/2+50mV VREF+0.04 VCCQ+0.3 VREF-0.15 VCCQ+0.3 VCCQ+0.6 1.35 2 5 Unit V V V V V V V V V uA uA mA mA mA mA Note 1 2 4 4 3 5 Notes: 1. Includes ± 25mV margin for DC offset on VREF, and a combined total of ± 50mV margin for all AC noise and DC offset on VREF, bandwidth limited to 20MHz. The DRAM must accommodate DRAM current spikes on VREF and internal DRAM noise coupled TO VREF, both of which may result in VREF noise. VREF should

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WV3EG6434S-BD4 datasheet
WV3EG6434S-BD4 pinouts
[ WV3EG6434S-BD4.PDF 데이터시트 ]

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