QS532806A 데이터시트 PDF



Integrated Device Technology에서 제조한 전자 부품 QS532806A은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.



QS532806A의 기능 및 특징 중 하나는 "Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer" 입니다.


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QS532806A 기능
Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer
Integrated Device Technology
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QS532806/A GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER FEATURES: − − − − − − − − JEDEC compatible LVTTL level 10 low skew clock outputs Monitor output Clock inputs are 5V tolerant Pinout and function compatible with QS5806 25Ω on-chip resistors for low noise Input hysteresis for better noise margin Guaranteed low skew: • 0.7ns output skew (same bank) • 0.9ns output skew (different bank) • 1ns part-to-part skew Std. and A speed grades Available in QSOP and SOIC packages QS532806/A DESCRIPTION The QS532806 clock driver/buffer circuit can be us

Contents of page 4 out of 6 pages :

QS532806/A GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIALTEMPERATURERANGE SKEW CHARACTERISTICS OVER OPERATING RANGE TA = -40°C to +85°C, VCC = 3.3V ± 0.3V CLOAD = 50pF (no resistor) QS532806 Symbol Parameter (1) Min. Max. tSK(01) Skew between all outputs, same transition, same bank — 0.7 QS532806A Min. Max. — 0.7 tSK(02) Skew between two outputs, same transition, different banks — 0.9 — 0.9 tSK(P) Pulse Skew; skew between opposite transitions of the same output (tPHL - tPLH) — 1.4 — 1.4 tSK(T) Part-to-part skew (2) — 1.5 — 1 NOTES: 1. This parameter is guaranteed but not production tested. Skew parameters apply to propagation delays only. 2. tSK(T) only applies to devices of the same transition, part type, temperature, power supply voltage, loading package, and speed grade. Unit ns ns ns ns SWITCHING CHARACTERISTICS OVER OPERATING RANGE TA = -40°C to +85°C, VCC = 3.3V ± 0.3V CLOAD = 50pF (no resistor) QS53806 QS532806A Symbol tPLH tPHL tR Parameter (1) Propagation Delay (2) Output Rise Time, 0.8V to 2V (3) Min. Max. Min. 1.5 6.5 1.5 —2— Max. Unit 5.8 ns 2 ns tF Output Fall Time, 2V to 0.8V (3) —2— 2 ns tPZL Output Enable Time tPZH tPLZ Output Disable Time tPZH 1.5 8 1.5 8 ns 1.5 7 1.5 7 ns NOTES: 1. Minimums guaranteed but not production tested. 2. The propagation delay other range indicated by Min. and Max. specifications results from process and environmental variables. These propagation www.dDealtaaySshdeoetn4oUt.icmopmly limit skew. 3. This parameter is guaranteed but not production tested. 4

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QS532806A datasheet
QS532806A pinouts
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부품번호상세설명 및 기능제조사
QS532806

Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer

Integrated Device Technology
Integrated Device Technology
QS532806A

Guaranteed Low Skew 3.3V CMOS Clock Driver/buffer

Integrated Device Technology
Integrated Device Technology

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